Features: • 17 differential 3.3V LVPECL outputs• Selectable CLK, nCLK or LVPECL clock inputs• CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL• PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL• Maximu...
ICS8532-01: Features: • 17 differential 3.3V LVPECL outputs• Selectable CLK, nCLK or LVPECL clock inputs• CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHST...
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Features: • Accepts various HD and SD references including hsync,transport and pixel clock r...
The ICS8532-01 is a low skew, 1-to-17, Differential- to-3.3V LVPECL Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS.
The ICS8532-01 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin.
Guaranteed output and part-to-part skew characteristics make the ICS8532-01 ideal for those clock distribution applications demanding well defined performance and repeatability.