ICS874004

Features:

* (4) Differential LVDS output pairs
* (1) Differential clock input
* CLK and nCLK supports the following input types:
   LVPECL, LVDS, LVHSTL, SSTL, HCSL
* Output frequency range: 98MHz - 160MHz
* Input frequency range: 98MHz - 128MHz
* VCO range: 490MHz - 640MHz
* Cycle-to-cycle jitter:  50ps (maximum) design target
* 3.3V  operating supply
* 3 bandwidth modes allow the system designer to make jitter
   attenuation/tracking skew design trade-offs
* 0°C to 70°C ambient operating temperature


Pinout




Specifications

Supply Voltage, V_DD                                                               4.6V
Inputs, V_I                                                       -0.5V to V_DD + 0.5 V 
Outputs, V_O                                                   -0.5V  to V_DD + 0.5V_O 
Package Thermal Impedance, _JA                        70°C/W (0 lfpm)
Storage Temperature, T_STG                                 -65°C to 150°C


Description

The ICS874004 is a high performance Differential-to HCSL Jitter Attenuator designed for use in PCI Express^(TM)systems. In some PCI Express^(TM)  systems, such as those found in desktop PCs, the PCI Express^(TM) clocks are generated from a low bandwidth,highphase noise PLL frequency synthesizer. In these systems, a jitter attenuator may be required to attenuate high frequency random and deterministic jitter components from the PLL synthesizer and from the system board. The ICS874004 has 3 PLL bandwidth modes: 200KHz, 400KHz, and 800KHz. 200KHz mode will provide maximum jitter attenuation, but with higher PLL tracking skew and spread spectrum modulation from the motherboard synthesizer may be attenuated. 400KHz provides an intermediate bandwidth that can easily track triangular spread profiles,while providing good jitter attenuation. 800KHz bandwidth provides the best tracking skew and will pass most spread profiles, but the jitter attenuation will not be as good as the lower bandwidth modes. Because some 2.5 Gb serdes have x20 multipliers while others have than x25 multipliers, the 874004 can be set for 1:1 mode or 5/4 multiplication mode (i.e. 100MHz input/125MHz output) using the F_SEL pin.

The ICS874004 uses ICS 3^rd Generation FemtoClock^TM PLL technology to achieve the lowest possible phase noise.The device is packaged in a 24 Lead TSSOP package, making it ideal for use in space constrained applications such as PCI Express^(TM) add-in cards.