ICS8741004

Features: • Two LVDS and two 0.7V differential output pairsBank A has two LVDS output pairs andBank B has two 0.7V differential output pairs• One differential clock input pair• CLK,CLK pair can accept the following differentialinput levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL•...

product image

ICS8741004 Picture
SeekIC No. : 004371097 Detail

ICS8741004: Features: • Two LVDS and two 0.7V differential output pairsBank A has two LVDS output pairs andBank B has two 0.7V differential output pairs• One differential clock input pair• CLK...

floor Price/Ceiling Price

Part Number:
ICS8741004
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2025/12/25

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Features:

• Two LVDS and two 0.7V differential output pairs
Bank A has two LVDS output pairs and
Bank B has two 0.7V differential output pairs
• One differential clock input pair
• CLK,CLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
• Output frequency range: 98MHz - 160MHz
• Input frequency range: 98MHz - 128MHz
• VCO range: 490MHz - 640MHz
• Cycle-to-cycle jitter: 35ps (maximum)
• Full 3.3V operating supply
• Three bandwidth modes allow the system designer to make
jitter attenuation/tracking skew design trade-offs
• 0to 70 ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6) packages


• Two LVDS and two 0.7V differential output pairs
Bank A has two LVDS output pairs and
Bank B has two 0.7V differential output pairs
• One differential clock input pair
• CLK,CLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
• Output frequency range: 98MHz - 160MHz
• Input frequency range: 98MHz - 128MHz
• VCO range: 490MHz - 640MHz
• Cycle-to-cycle jitter: 35ps (maximum)
• Full 3.3V operating supply
• Three bandwidth modes allow the system designer to make
jitter attenuation/tracking skew design trade-offs
• 0to 70 ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6) packages







Pinout

  Connection Diagram

  Connection Diagram




Specifications

Item Rating
Supply Voltage, VDD 4.6V
Inputs, VI -0.5V to VDD + 0.5V
Outputs, VO -0.5V to VDDO + 0.5V
Package Thermal Impedance, JA 82.3/W (0 mps)
Storage Temperature, TSTG -65 to 150

NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.



Item Rating
Supply Voltage, VDD 4.6V
Inputs, VI -0.5V to VDD + 0.5V
Outputs, VO -0.5V to VDDO + 0.5V
Package Thermal Impedance, JA 82.3/W (0 mps)
Storage Temperature, TSTG -65 to 150

NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.








Description

The ICS8741004 is a high performance Differential-to-LVDS/0.7V Differential Jitter Attenuator designed for use in PCI Express™ systems. In some PCI Express systems, such as those found in desktop PCs, the PCI Express clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer. In these systems, a jitter attenuator may be required to attenuate high frequency random and deterministic jitter components from the PLL synthesizer and from the system board. The ICS8741004 has 3 PLL bandwidth modes: 200kHz, 600kHz and 2MHz. The 200kHz mode will provide maximum jitter attenuation, but with higher PLL tracking skew and spread spectrum modulation from the motherboard synthesizer may be attenuated. The 600kHz provides an intermediate bandwidth that can easily track triangular spread profiles, while providing good jitter attenuation. The 2MHz bandwidth provides the best tracking skew and will pass most spread profiles, but the jitter attenuation will not be as good as the lower bandwidth modes. Because some 2.5Gb serdes have x20 multipliers while others have x25 multipliers, the ICS8741004 can be set for 1:1 mode or 5/4 multiplication mode (i.e. 100MHz input/125MHz output) using the F_SEL pins.

The ICS8741004 uses IDT's 3rd Generation FemtoClock™ PLL technology to achieve the lowest possible phase noise. The device is packaged in a 24 Lead TSSOP package, making it ideal for use in space constrained applications such as PCI Express add-in cards.






Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
Batteries, Chargers, Holders
Line Protection, Backups
Test Equipment
RF and RFID
Audio Products
Integrated Circuits (ICs)
View more