ICS87972I

1. System Clock generator: Use a 16.66 MHz Crystal to generate eight 33.33MHz copies for PCI and four 100MHz copies for the CPU or PCI-X.

2. Line Card Multiplier: Multiply 19.44MHz from a back plane to 77.76MHz for the line Card ASICs and Serdes.

3. Zero Delay buffer for Synchronous memory: Fan out up to twelve 100MHz copies from a memory controller reference clock to the memory chips on a memory module with zero delay.

The ICS87972I is a LVCMOS clock generator and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The
ICS87972I has three selectable inputs and provides 14 LVCMOS outputs.

The ICS87972I is a highly flexible device. Using the crystal oscillator input, it can be used to generate clocks for a system. All of these clocks can be the same frequency or the device can be configured to generate up to three different frequencies among the three output banks. Using one of the single ended inputs, the ICS87972I can be used as a zero delay buffer/multiplier/divider in clock distribution applications.

The three output banks and feedback output of the ICS87972I each have their own output dividers which allows the device to generate a multitude of different bank frequency ratios and output-to-input frequency ratios. In addition, 2 outputs in Bank C (QC2, QC3) can be selected to be inverting or non-inverting. The output frequency range is 8.33MHz - 125MHz. Input frequency range is 5MHz - 120MHz.

The ICS87972I also has a QSYNC output which can be used for system synchronization purposes. It monitors Bank A and Bank C outputs and goes low one period of the faster clock prior to coincident rising edges of Bank A and Bank C clocks. QSYNC then goes high again when the coincident rising edges of Bank A and Bank C occur. This feature is used primarily in applications where Bank A and Bank C are running at different frequencies, and is particularly useful when they are running at non-integer multiples of one another.