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ICS9147-14

Features: · Four copies of CPU clock· Twelve SDRAM (3.3 V TTL), usable as AGP clocks· Seven copies of PCICLK clock (synchronous with CPU clock/2 or CPU/2.5 for 75 and 83.3 MHz CPU)· CPU clocks to PCICLK clocks skew 1-4ns, center 2.6ns.· One IOAPIC clock @14.31818 MHz· Two copies of Ref. clock @14....

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SeekIC No. : 004371156 Detail

ICS9147-14: Features: · Four copies of CPU clock· Twelve SDRAM (3.3 V TTL), usable as AGP clocks· Seven copies of PCICLK clock (synchronous with CPU clock/2 or CPU/2.5 for 75 and 83.3 MHz CPU)· CPU clocks to PC...

ICS9147-14 Data Sheet

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Part Number:
ICS9147-14
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

· Four copies of CPU clock
· Twelve SDRAM (3.3 V TTL), usable as AGP clocks
· Seven copies of PCICLK clock (synchronous with CPU clock/2 or CPU/2.5 for 75 and 83.3 MHz CPU)
· CPU clocks to PCICLK clocks skew 1-4ns, center 2.6ns.
· One IOAPIC clock @14.31818 MHz
· Two copies of Ref. clock @14.31818 MHz
· Ref. 14.31818 MHz Xtal oscillator input
· Separate VDDL1 for four CPU and single IOAPIC output buffers to allow 2.5V output (or Std. Vdd)
· One each 48/ 24 MHz (3.3 V TTL)
· 3.3V outputs: SDRAM, PCI, REF, 48/24MHz.
· 2.5V or 3.3V outputs: CPU, IOAPIC.
· 20 ohm CPU clock output impedance
· 20 ohm PCI clock output impedance
· 1.5ns rise time (30 pF loading)
·±250 ps CPU, PCI clock skew
· 350ps (cycle by cycle) CPU jitter
· 2ms Power up clock stable time
· 45-55% Clock duty cycle
· 48 pin 300 mil SSOP package
· 3.0V – 3.7V supply range w/2.5V compatible outputs


Pinout

Connection Diagram


Specifications

Supply Voltage . . . . . . . . . . . . . . . . . . . ... . . . . . . . . . .  . . . . . . 7.0 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . GND-–0.5 V to VDD +0.5 V
Ambient Operating Temperature . .  . .  . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . .   -65°C to +150°C


Description

The ICS9147-14 generates all clocks required for high speed RISC or CISC microprocessor systems such as Intel PentiumPro. Two bidirectional I/O pins (FS1,FS2) are latched at power-on to the functionality table, with FS0 selectable in real-time to toggle between conditions.

High drive PCICLK and SDRAM outputs of the ICS9147-14 typically provide greater than 1 V/ns slew rate into 30pF loads. CPU outputs typically provide better than 1V/ns slew rate into 20pF loads while maintaining 50 ±5% duty cycle. The REF clock outputs typically provide better than 0.5V/ns slew rates. Seperate buffers supply pins VDDL1 allow for 3.3V or reduced voltage swing (from 2.9 to 2.5V) for CPU (0:3) and IOAPIC outputs.




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