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ICS93725

Features: • Low skew, Zero Delay Buffer• 1 to 13 SDRAM PC133 clock distribution• 1 to 6 pairs of DDR clock distribution• I2C for functional and output control• Separate feedback path for both memory mode to adjust synchronization.• Supports up to 2 DDR DIMMs or ...

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ICS93725: Features: • Low skew, Zero Delay Buffer• 1 to 13 SDRAM PC133 clock distribution• 1 to 6 pairs of DDR clock distribution• I2C for functional and output control• Separate...

ICS93725 Data Sheet

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Part Number:
ICS93725
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Low skew, Zero Delay Buffer
• 1 to 13 SDRAM PC133 clock distribution
• 1 to 6 pairs of DDR clock distribution
• I2C for functional and output control
• Separate feedback path for both memory mode to adjust synchronization.
• Supports up to 2 DDR DIMMs or 3 SDRAM DIMMs
• Frequency support for up to 200MHz
• Individual I2C clock stop for power mananagement
• CMOS level control signal input


Pinout

Connection Diagram


Specifications

Supply Voltage (VDD & VDD2.5).........................-0.5V to 3.6V
Logic Inputs............................GND 0.5 V to VDD +0.5 V
Ambient Operating Temperature....................... 0°C to +85°C
Case Temperature  ..................................115°C
Storage Temperature  ..........................65°C to +150°C

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.


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