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Part Number: ICS952011

 

 

 

 

Description: The ICS952011 is a two chip clock solution for desktop designs using SIS 645/645DX/648/650 style chips...


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ICS952011 General Description


The ICS952011 is a two chip clock solution for desktop designs using SIS 645/645DX/648/650 style chipsets. When used with a zero delay buffer such as the ICS9179-16 for PC133 or the ICS93735 for DDR applications it provides all the necessary clocks signals for such a system. The ICS952011 is part of a whole new line of ICS clock generators and buffers called TCH™ (Timing Control Hub). ICS is the first to introduce a whole product line which offers full programmability and flexibility on a single clock device. Employing the use of a serially programmable I2C interface, this device can adjust the output clocks by configuring the frequency setting, the output divider ratios, selecting the ideal spread percentage, the output skew, the output strength, and enabling/disabling each individual output clock.

TCH also incorporates ICS's Watchdog Timer technology and a reset feature to provide a safe setting under unstable system conditions. M/N control can configure output frequency with resolution up to 0.1MHz increment.

ICS952011 Maximum Ratings

Core Supply Voltage . . . . . . . . . . . . . . . . . . . . . . 4.6 V
I/O Supply Voltage . . . . . . . . . . . . . . . . . . . . . .  . 3.6V
Logic Inputs . . . . . . . . . .. . GND 0.5 V to VDD +0.5 V
Ambient Operating Temperature . . .. . 0°C to +70°C
Storage Temperature . . . . .  . . . . 65°C to +150°C
Case Temperature . . . . . . . . . . . . . . . . . . . .  . 115°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.

ICS952011 Features

• Selectable asynchronous/synchronous AGP, ZCLK and PCI outputs
• Supports DDR333 OEM frequencies
• Programmable output frequency, divider ratios, output rise/falltime, output skew.
• Programmable spread percentage for EMI control.
• Watchdog timer technology to reset system if system malfunctions.
• Programmable watch dog safe frequency.
• Support I2C Index read/write and block read/write operations.
• For PC133 SDRAM system use the ICS9179-16 as the memory buffer.
• For DDR SDRAM system use the ICS93735 or ICS93732 as the memory buffer.
• Uses external 14.318MHz crystal.

ICS952011 Typical Application

• 2 - Pairs of differential CPUCLKs (differential current mode)
• 1 - SDRAM @ 3.3V
• 9 - PCI @3.3V (including 2 free-running)
• 2 - AGP @ 3.3V
• 2 - ZCLKs @ 3.3V
• 1- 12/48MHZ @ 3.3V
• 1- 24/48MHz, @3.3V selectable by I2C
• 3- REF @3.3V, 14.318MHz.

ICS952011 Connection Diagram

ICS952011  Connection Diagram

ICS952011 datasheet

ICS952011
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