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Part Number: IDT7005S

 

 

Package Cooled: PLCC

D/C: 04+

Description: The IDT7005 is a high-speed 8K x 8 Dual-Port Static RAM. The IDT7005 is designed to be used as a stand...


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IDT7005S General Description


The IDT7005 is a high-speed 8K x 8 Dual-Port Static RAM. The IDT7005 is designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. Using the IDT MASTER/  LAVE Dual-Port RAM approach in 16-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic.

This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.

Fabricated using IDT's CMOS high-performance technology, these devices typically operate on only 750mW of power.Low-power (L) versions offer battery backup data retention capability with typical power consumption of 500mW from a 2V battery.

The IDT7005 is packaged in a ceramic 68-pin PGA, a 68- pin quad flatpack, a 68-pin PLCC and a 64-pin Thin Plastic Quad Flatpack (TQFP). Military grade product is manufactured in compliance with the latest revision of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability.

IDT7005S Maximum Ratings

Symbol
Rating
Commercial
Military
Unit
VTERM(2)
Terminal Voltage
with Respectto GND
0.5 to +7.0
0.5 to +7.0
V

TA
OperatingTemperature
0 to +70
55 to +125
°C
TBIAS
TemperatureUnder Bia
55 to +125
65 to +135
°C
TSTG
StorageTemperature
55 to +125
65 to +150
°C

IOUT
DC OutputCurrent
50

50
mA
NOTES: 2738 tbl 04
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VTERM must not exceed Vcc + 0.5V for more than 25% of the cycle time or 10% maximum,
and is limited to < 20mA for the period of VTERM > Vcc + 0.5V.

IDT7005S Features

• True Dual-Ported memory cells which allow simultaneous access of the same memory location
• High-speed access - Military: 20/25/35/55/70ns (max.) - Commercial:15/17/20/25/35/55ns (max.)
• Low-power operation - IDT7005S Active: 750mW (typ.) Standby: 5mW (typ.) - IDT7005L Active: 750mW (typ.) Standby: 1mW (typ.)
• IDT7005 easily expands data bus width to 16 bits or more using the Master/Slave select when cascading more than one device
• M/S = H for BUSY output flag on Master, M/S = L for BUSY input on Slave
• Busy and Interrupt Flags
• On-chip port arbitration logic
• Full on-chip hardware support of Semaphore signaling between ports
• Fully asynchronous operation from either port
• Devices are capable of withstanding greater than 2001V electrostatic discharge
• Battery backup operation-2V data retention
• TTL-compatible, single 5V (±10%) power supply
• Available in 68-pin PGA, 68-pin quad flatpack, 68-pin PLCC, and a 64-pin TQFP
• Industrial temperature range (40°C to +85°C) is available, tested to military electrical specifications

IDT7005S Connection Diagram

IDT7005S  Connection Diagram

IDT7005S datasheet

IDT7005S
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