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Part Number: IDT7015S/L

 

 

 

 

Description: The IDT7015 is a high-speed 8K x 9 Dual-Port Static RAM. The IDT7015 is designed to be used as a stand...


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IDT7015S/L General Description


The IDT7015 is a high-speed 8K x 9 Dual-Port Static RAM. The IDT7015 is designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 18-bit-or-more word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 18- bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.

Fabricated using IDT's CMOS high-performance technology, these devices typically operate on only 750mW of power. The IDT7015 is packaged in a ceramic 68-pin PGA, a 64-pin PLCC and an 80-pinTQFP (Thin Quad Flatpack). Military grade product is manufactured in compliance with the latest revision of MIL-PRF- 38535 QML, making it ideally suited to military temperature applications demanding the highest level of performance and reliability.

IDT7015S/L Maximum Ratings

Symbol
Rating
Com'l & Ind'l
Unit
Military
VTERM
Terminal Voltage
with respect to GND
-0.5 to +7.0
V
-0.5 to +7.0
TSTG
Temperature Under
Bias
-55 to +125
°C
-65 to +135
TSTG
Storage
Temperature
50 to +150
mA
-65 to +150
IOUT
DC Output Current
50
mA
50

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect
reliability.
2. VTERM must not exceed Vcc + 10% for more than 25% of the cycle time or 10ns
maximum, and is limited to < 20mA for the period of VTERM > Vcc + 10%. 2954 tbl 04

IDT7015S/L Features

  M/S = VIH for BUSY output flag on Master M/S = VIL for BUSY input on Slave
  Busy and Interrupt Flag
  On-chip port arbitration logic
  Full on-chip hardware support of semaphore signaling between ports
  Fully asynchronous operation from either port
  TTL-compatible, single 5V (±10%) power supply
  Available in ceramic 68-pin PGA, 68-pin PLCC, and an 80- pin TQFP
  Industrial temperature range (40°C to +85°C) is available for selected speeds
 of the same memory location
 High-speed access
Military: 20/25/35ns (max.)
Commercial: 12/15/17/20/25/35ns (max.)
  Low-power operation
IDT7015S
Active: 750mW (typ.)
Standby: 5mW (typ.)
IDT7015L
Active: 750mW (typ.)
Standby: 1mW (typ.)
 IDT7015 easily expands data bus width to 18 bits or more
using the Master/Slave select when cascading more than one device

IDT7015S/L Connection Diagram

IDT7015S/L  Connection Diagram
NOTES:
1. All VCC pins must be connected to power supply.
2. All GND pins must be connected to ground supply.
3. Package body is approximately .95 in x .95 in x .17 in.
4. This package code is used to reference the package diagram.
5. This text does not imply orientation of Part-marking.

IDT7015S/L datasheet

IDT7015S/L
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