Features: • True Dual-Ported memory cells which allow simultaneous access of the same memory location
• High-speed access - Military: 20/25/35/55/70ns (max.) - Commercial: 15/17/20/25/35/55ns (max.)
• Low-power operation - IDT7025S Active: 750mW (typ.) Standby: 5mW (typ.) - IDT7025L Active: 750mW (typ.) Standby: 1mW (typ.)
• Separate upper-byte and lower-byte control for multiplexed bus compatibility
• IDT7025 easily expands data bus width to 32 bits or more using the Master/Slave select when cascading more than one device
• M/S = H for BUSY output flag on Master M/S = L for BUSY input on Slave
• Busy and Interrupt Flags
• On-chip port arbitration logic
• Full on-chip hardware support of semaphore signaling between ports
• Devices are capable of withstanding greater than 2001V electrostatic discharge
• Fully asynchronous operation from either port
• Battery backup operation-2V data retention
• TTL-compatible, single 5V (±10%) power supply
• Available in 84-pin PGA, 84-pin quad flatpack, 84-pin PLCC, and 100-pin Thin Quad Plastic Flatpack
• Industrial temperature range (40°C to +85°C) is available, tested to military electrical specifications
Pinout
Specifications
|
Symbol |
Rating |
Commercial |
Military |
Unit |
|
VTERM(2) |
Terminal Voltage
with Respectto GND |
0.5 to +7.0 |
0.5 to +7.0 |
V |
|
TA
|
OperatingTemperature |
0 to +70 |
55 to +125 |
°C |
|
TBIAS |
TemperatureUnder Bia |
55 to +125 |
65 to +135 |
°C |
|
TSTG |
StorageTemperature |
55 to +125 |
65 to +150 |
°C |
|
IOUT
|
DC OutputCurrent |
50 |
50
|
mA |
NOTES: 2683 tbl 05
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VTERM must not exceed Vcc + 0.5V for more than 25% of the cycle time or 10ns maximum, and
is limited to < 20 mA for the period over VTERM > Vcc + 0.5V.DescriptionThe IDT7025S is a high-speed 8K x 16 Dual-Port Static RAM. The IDT7025 is designed to be used as a stand-alone128K-bit Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 32-bit or more word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 32-bit or wider memory system applications results in fullspeed, error-free operation without the need for additional discrete logic.
This IDT7025S provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by Chip Enable ( CE ) permits the on-chip circuitry of each port to enter a very low standby power mode.
Fabricated using IDT's CMOS high-performance technology, these devices typically operate on only 750mW of power. Low-power (L) versions offer battery backup data retention capability with typical power consumption of 500mW from a 2V battery.
The IDT7025S is packaged in a ceramic 84-pin PGA, an 84- pin quad flatpack, an 84-pin PLCC, and a 100-pin TQFP. Military grade product is manufactured in compliance with the latest revision of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability.
IDT7025S Data Sheet
