IDT70V3579S

Features: ` True Dual-Port memory cells which allow simultaneous ccess of the same memory location` High-speed clock to data access Commercial: 4.2/5/6ns (max.) Industrial: 5/6ns (max)` Pipelined output mode` Counter enable and reset features` Dual chip enables allow for depth expansion withoutadd...

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SeekIC No. : 004372129 Detail

IDT70V3579S: Features: ` True Dual-Port memory cells which allow simultaneous ccess of the same memory location` High-speed clock to data access Commercial: 4.2/5/6ns (max.) Industrial: 5/6ns (max)` Pipelined ou...

floor Price/Ceiling Price

Part Number:
IDT70V3579S
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2026/1/11

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Product Details

Description



Features:

` True Dual-Port memory cells which allow simultaneous ccess of the same memory location
` High-speed clock to data access
    Commercial: 4.2/5/6ns (max.)  
    Industrial: 5/6ns (max)
` Pipelined output mode
` Counter enable and reset features
` Dual chip enables allow for depth expansion withoutadditional logic
` Full synchronous operation on both ports
   -7.5ns cycle time, 133MHz operation (9.6 Gbps bandwidth)
   -Fast 4.2ns clock to data out
   -1.8ns setup to clock and 0.7ns hold on all control, data, and address inputs @ 133MHz
   -Data input, address, byte enable and control registers
   -Self-timed write allows fast cycle time
` Separate byte controls for multiplexed bus and busmatching compatibility
` LVTTL- compatible, single 3.3V (±150mV) power supply forcore
` LVTTL- compatible, selectable 3.3V (±150mV)/2.5V (±125mV)power supply for I/Os and control signals on each port
` Industrial temperature range (-40°C to +85°C) isavailable for selected speeds
` Available in a 208-pin Plastic Quad Flatpack (PQFP),208-ball fine-pitch Ball Grid Array, and 256-pin Ball rid Array
 


Pinout

  Connection Diagram


Specifications

Symbol Rating

Commercial
& Industrial
Unit
VTERM(2) Terminal Voltage with Respect to GND
-0.5 to +4.6
V
TBIAS Temperature Under Bias
55 to +125
TSTG Storage Temperature
65 to +150
IOUT DC Output Current
50
mA

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VTERM must not exceed VDD + 150mV for more than 25% of the cycle time or4ns maximum, and is limited to  20mA for the period of VTERM VDD + 150mV.



Description

The IDT70V3579S is a high-speed 32K x 36 bit synchronous Dual-Port RAM. The memory array utilizes Dual-Port memory cells to allowsimultaneous access of any address from both ports. Registers oncontrol, data, and address inputs provide minimal setup and holdtimes. The timing latitude provided by this approach allows systemsto be designed with very short cycle times. With an input data register, the IDT70V3579S has been optimized for applications having unidirectional orbidirectional data flow in bursts. An automatic power down feature,controlled by CE0 and CE1, permits the on-chip circuitry of each port toenter a very low standby power mode.

The IDT70V3579S can support an operating voltage of either 3.3V or 2.5Von one or both ports, controllable by the OPT pins. The power supply forthe core of the device (VDD) remains at 3.3V.




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