IDT70V7399S

Features: 128K x 18 Synchronous Bank-Switchable Dual-portedSRAM Architecture 64 independent 2K x 18 banks 2 megabits of memory on chipBank access controlled via bank address pinsHigh-speed data access Commercial: 3.4ns (200MHz)/3.6ns (166MHz)/4.2ns (133MHz) (max.) Industrial: 3.6 (166MHz)/4.2ns (1...

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IDT70V7399S Picture
SeekIC No. : 004372149 Detail

IDT70V7399S: Features: 128K x 18 Synchronous Bank-Switchable Dual-portedSRAM Architecture 64 independent 2K x 18 banks 2 megabits of memory on chipBank access controlled via bank address pinsHigh-speed data acce...

floor Price/Ceiling Price

Part Number:
IDT70V7399S
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2024/5/5

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Product Details

Description



Features:

128K x 18 Synchronous Bank-Switchable Dual-ported
SRAM Architecture
64 independent 2K x 18 banks
2 megabits of memory on chip
Bank access controlled via bank address pins
High-speed data access
Commercial: 3.4ns (200MHz)/3.6ns (166MHz)/
4.2ns (133MHz) (max.)
Industrial: 3.6 (166MHz)/4.2ns (133MHz) (max.)
Selectable Pipelined or Flow-Through output mode
Counter enable and repeat features
Dual chip enables allow for depth expansion without additional logic
Full synchronous operation on both ports
5ns cycle time, 200MHz operation (14Gbps bandwidth)
Fast 3.4ns clock to data out
1.5ns setup to clock and 0.5ns hold on all control, data, and
address inputs @ 200MHz
Data input, address, byte enable and control registers
Self-timed write allows fast cycle time
Separate byte controls for multiplexed bus and bus matching compatibility
LVTTL- compatible, 3.3V (±150mV) power supply for core
LVTTL compatible, selectable 3.3V (±150mV) or 2.5V
(±100mV) power supply for I/Os and control signals on each port
Industrial temperature range (-40°C to +85°C) is
available at 166MHz and 133MHz
Available in a 144-pin Thin Quad Flatpack (TQFP),
208-pin fine pitch Ball Grid Array (fpBGA), and 256-pin Ball
Grid Array (BGA)
Supports JTAG features compliant with IEEE 1149.1
Due to limited pin count, JTAG is not supported on the
144-pin TQFP package.



Pinout

  Connection Diagram


Specifications

Symbol

Rating

Commercial
& Industrial

Unit

VTERM(2)

Terminal Voltage
with Respect to
GND

-0.5 to +4.6

V

TBIAS

Temperature
Under Bias

-55 to +125

oC

TSTG

Storage
Temperature

-65 to +150

oC

IOUT

DC Output Current

50

mA




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