IDT72240

  The IDT72420/72200/72210/72220/72230/72240 SyncFIFO are very high-speed, low-power First-In, First-
Out (FIFO) memories with clocked  read and write controls.The  IDT72420/72200/72210/72220/72230/72240 have a 64,256, 512, 1024, 2048, and 4096 x 8-bit memory array, respec- tively. These FIFOs are applicable for a wide variety of data buffering needs, such as graphics, Local Area Networks (LANs), and interprocessor communication.

  These FIFOs have 8-bit input and output ports. The input port is controlled by a free-running clock (WCLK), and a write enable pin (WEN).  Data is written into the Synchronous FIFO on every clock when WEN is asserted. The output port is controlled by another clock pin (RCLK) and a read enable pin (REN).  The read clock can be tied to the write clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation.  An output enable pin (OE) is provided on the read port for three-state control of the output.

  These Synchronous FIFOs have two end-point flags, Empty (EF) and Full (FF). Two partial flags, Almost-Empty (AE) and Almost-Full (AF), are provided for improved system control. The partial ( AE) flags are set to Empty+7 and Full-7 for AE and AF respectively.

  The IDT72420/72200/72210/72220/72230/72240 are fabri- cated using IDT's high-speed submicron CMOS technology. Military grade product is manufactured in compliance with the latest  revision of MIL-STD-883, Class B.