IDT72274

Features: Select 8192 x 18 or 16384x 9 organization (IDT72264)Select 16384 x 18 or 32678 x 9 organization (IDT72274)Flexible control of read and write clock frequenciesReduced dynamic power dissipationAuto power down minimizes power consumption15 ns read/write cycle time (10 ns access time)Retrans...

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IDT72274 Picture
SeekIC No. : 004372401 Detail

IDT72274: Features: Select 8192 x 18 or 16384x 9 organization (IDT72264)Select 16384 x 18 or 32678 x 9 organization (IDT72274)Flexible control of read and write clock frequenciesReduced dynamic power dissipat...

floor Price/Ceiling Price

Part Number:
IDT72274
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/6

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Product Details

Description



Features:

Select 8192 x 18 or 16384x 9 organization (IDT72264)
Select 16384 x 18 or 32678 x 9 organization (IDT72274)
Flexible control of read and write clock frequencies
Reduced dynamic power dissipation
Auto power down minimizes power consumption
15 ns read/write cycle time (10 ns access time)
Retransmit Capability
Master Reset clears entire FIFO, Partial Reset clears data, but retains programmable settings
Empty, full and half-full flags signal FIFO status
Programmable almost empty and almost full flags, each flag can default to one of two preselected offsets

Program partial flags by either serial or parallel means
Select IDT Standard timing (using EF and FF flags) or First Word Fall Through timing (using OR and IR  flags)

Easily expandable in depth and width
Independent read and write clocks (permits simultaneous reading and writing with one clock signal)
Available in the 64-pin Thin Quad Flat Pack (TQFP), 64-pin Slim Thin Quad Flat Pack (STQFP) and the 68-pin Pin Grid Array (PGA)
Output enable puts data outputs into high impedance
High-performance submicron CMOS technology
Industrial temperature range (-40 to +85) is avail-able, tested to military electrical specifications

  


Pinout

  Connection Diagram


Specifications

Symbol Rating Commercial Unit
VTERM Terminal Voltage
with respect to GND
-0.5 to +7. V
TA Operating
Temperature
0 to +70  
TBIAS Temperature Under
Bias
-55 to +12   
TSTG Storage
Temperature
-55 to +12   
IOUT DC Output Current 50 mA



Description

The IDT72274 are monolithic, CMOS, high capac-ity, high speed, low power first-in, first-out (FIFO) memories
with clocked read and write controls.  These FIFOs have  three main features that distinguish them among SuperSync FIFOs:

First, the data path width can be changed from 9-bits to 18-bits; as a result,halving the depth. A pin called Memory Array Select  (MAC)  chooses between the two options.This feature helps reduce the need for redesigns or multiple versions of PC cards, since a single layout can be used for both data bus widths.

Second,  IDT72274 offer the greatest flexibility for setting and varying the read and write clock (WCLK and
RCLK) frequencies.  For example,given that the two clock frequencies are unequal, the slower clock may exceed the
faster by, at most, twice its frequency.  This feature is espe-cially useful for communications and network applications where clock frequencies are switched to permit different data rates.




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