Purchase IDT72V2101, In-stock IDT72V2101 From SeekIC.
Part Number: IDT72V2101
Description: The IDT72V2101/72V2111 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories wit...
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IDT72V2101
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DataSheet
General Description
IDT72V2101 General Description
The IDT72V2101/72V2111 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls. These FIFOs offer numerous improvements over previous SuperSync FIFOs, including the following:
• The limitation of the frequency of one clock input with respect to the other has been removed. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency.
• The period required by the retransmit operation is now fixed and short.
• The first word data latency period, from the time the first word is written to an empty FIFO to the time it can be read, is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperSync family.) SuperSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data.
IDT72V2101 Maximum Ratings
| Symbol | Rating | Com'l & Ind'l | Unit |
| VTERM(2) | Terminal Voltage with respect to GND |
0.5 to +4.5 | V |
| TSTG | Storage Temperature |
55 to +125 | |
| IOUT | DC Output Current | 50 to +50 | mA |
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VCC terminal only.
IDT72V2101 Features
• Choose among the following memory organizations:
IDT72V2101 262,144 x 9
IDT72V2111 524,288 x 9
• Pin-compatible with the IDT72V261/72V271 and the IDT72V281/ 72V291 SuperSync FIFOs
• 10ns read/write cycle time (6.5ns access time)
• Fixed, low first word data latency time
• 5V input tolerant
• Auto power down minimizes standby power consumption
• Master Reset clears entire FIFO
• Partial Reset clears data, but retains programmable settings
• Retransmit operation with fixed, low first word data latency time
• Empty, Full and Half-Full flags signal FIFO status
• Programmable Almost-Empty and Almost-Full flags, each flag can default to one of two preselected offsets
• Program partial flags by either serial or parallel means
• Select IDT Standard timing (using EF and FF flags) or First Word Fall Through timing (using OR and IR flags)
• Output enable puts data outputs into high impedance state
• Easily expandable in depth and width
• Independent Read and Write clocks (permit reading and writing simultaneously)
• Available in the 64-pin Thin Quad Flat Pack (TQFP)
• High-performance submicron CMOS technology
IDT72V2101 262,144 x 9
IDT72V2111 524,288 x 9
• Pin-compatible with the IDT72V261/72V271 and the IDT72V281/ 72V291 SuperSync FIFOs
• 10ns read/write cycle time (6.5ns access time)
• Fixed, low first word data latency time
• 5V input tolerant
• Auto power down minimizes standby power consumption
• Master Reset clears entire FIFO
• Partial Reset clears data, but retains programmable settings
• Retransmit operation with fixed, low first word data latency time
• Empty, Full and Half-Full flags signal FIFO status
• Programmable Almost-Empty and Almost-Full flags, each flag can default to one of two preselected offsets
• Program partial flags by either serial or parallel means
• Select IDT Standard timing (using EF and FF flags) or First Word Fall Through timing (using OR and IR flags)
• Output enable puts data outputs into high impedance state
• Easily expandable in depth and width
• Independent Read and Write clocks (permit reading and writing simultaneously)
• Available in the 64-pin Thin Quad Flat Pack (TQFP)
• High-performance submicron CMOS technology
IDT72V2101 Connection Diagram
IDT72V2101
PDF/DataSheet Download
- Datasheet: IDT72V2101
- File Size: 248241 KB
- Manufacturer: IDT [Integrated Device Technology]
- Click here to Download
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