IDT72V3653

The IDT72V3653/72V3663/72V3673 are pin and functionally compatible versions of the IDT723653/723663/723673, designed to run off a 3.3V supply for exceptionally low power consumption. These devices are monolithic, highspeed, low-power, CMOS unidirectional Synchronous (clocked) FIFO memory which supports clock frequencies up to 100 MHz and has read access times as fast as 6.5 ns. The 2,048/4,096/8,192 x 36 dual-port SRAM FIFO buffers data from Port A to Port B. FIFO data on Port B can output in 36-bit, 18-bit, or 9-bit formats with a choice of Big- or Little-Endian configurations. These devices are synchronous (clocked) FIFOs, meaning each port employs a synchronous interface. All data transfers through a port are gated to the LOW-to-HIGH transition of a port clock by enable signals. The clocks for