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Part Number: IDT72V71650

 

 

 

 

Description: The IDT72V71650 has a non-blocking switch capacity of 1,024 x 1,024 channels at 2.048Mb/s, 2,048 x 2,0...


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IDT72V71650 General Description


The IDT72V71650 has a non-blocking switch capacity of 1,024 x 1,024 channels at 2.048Mb/s, 2,048 x 2,048 channels at 4.096Mb/s, and 4,096 x 4,096 channels at 8.192Mb/s and 8,192 x 8,192 channels at 16.384Mb/s. With 32 inputs and 32 outputs, programmable per stream control, and a variety of operating modes the IDT72V71650 is designed for the TDM time slot interchange function in either voice or data applications.

Some of the main features of the IDT72V71650 are low power 3.3 Volt operation, automatic ST-BUS® /GCI sensing, memory block programming, simple microprocessor interface, one cycle direct internal memory accesses, JTAG Test Access Port (TAP) and per stream programmable input offset delay, variable or constant throughput modes, output enable and processor mode.

The IDT72V71650 is capable of switching up to 8,192 x 8,192 channels without blocking. Designed to switch 64 Kbit/s PCM or N x 64 Kbit/s data, the device maintains frame integrity in data applications and minimizes throughput delay for voice applications on a per-channel basis.

IDT72V71650 Maximum Ratings

Symbol Parameter Min. Max. Unit
VCC Supply Voltage -0.3 5.0 V
Vi Voltage on Digital Inputs GND -0.3 5.5 V
IO Current at Digital Outputs   20 mA
TS Storage Temperature -65 +125 °C
PD Package Power Dissapation  1 W

NOTE:
1. Exceeding these values may cause permanent damage. Functional operation
    under these conditions is not implied.

IDT72V71650 Features

• 8K x 8K non-blocking switching at 16.384Mb/s
• 32 serial input and output streams
• Accepts data streams at 2.048Mb/s, 4.096Mb/s, 8.192Mb/s or 16.384Mb/s
• Per-channel Variable Delay Mode for low-latency applications
• Per-channel Constant Delay Mode for frame integrity applications
• Automatic identification of ST-BUS® and GCI bus interfaces
• Automatic frame offset delay measurement
• Per-stream frame delay offset programming
• Per-channel high-impedance output control
• Direct microprocessor access to all internal memories
• Memory block programming for quick setup
• IEEE-1149.1 (JTAG) Test Port
• 3.3V Power Supply
• Available in 144-pin (13mm x 13mm) Plastic Ball Grid Array (PBGA)
  and 144-pin (20mm x 20mm) Thin Quad Flatpack (TQFP) packages
• Operating Temperature Range -40°C to +85°C

IDT72V71650 Connection Diagram

IDT72V71650  Connection Diagram

IDT72V71650 datasheet

IDT72V71650
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