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Part Number: IDT72V73250

 

 

 

 

Description: The IDT72V73250 has a non-blocking switch capacity of 8,192 x 8,192 channels at 32.768Mb/s. With 16 in...


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IDT72V73250 General Description


The IDT72V73250 has a non-blocking switch capacity of 8,192 x 8,192 channels at 32.768Mb/s. With 16 inputs and 16 outputs, programmable per stream control, and a variety of operating modes the IDT72V73250 is designed for the TDM time slot interchange function in either voice or data applications. Some of the main features of the IDT72V73250 are LOW power 3.3 Volt operation, automatic ST-BUS® /GCI sensing, memory block programming, simple microprocessor interface, JTAG Test Access Port (TAP) and per stream programmable input offset delay, variable or constant throughput modes, output enable and processor mode.


The IDT72V73250 is capable of switching up to 8,192 x 8,192 channels without blocking. Designed to switch 64 Kbit/s PCM or N x 64 Kbit/s data, the device maintains frame integrity in data applications and minimizes throughput delay for voice applications on a per-channel basis.

The 16 serial input streams (RX) of the IDT72V73250 are run at 32.768Mb/s allowing 512 channels per 125s frame. The data rates on the output streams (TX) are identical to those on the input streams (RX).

IDT72V73250 Maximum Ratings

Symbol Parameter Min. Max. Unit
VCC Supply Voltage -0.5 +4.0 V
Vi Voltage on Digital Inputs GND -0.3 VCC +0.3 V
IO Current at Digital Outputs -50 50 mA
TS Storage Temperature -55 +125 °C
PD Package Power Dissapation 2 W

NOTE:
1. Exceeding these values may cause permanent damage. Functional operation under
    these conditions is not implied.

IDT72V73250 Features

• 8K x 8K non-blocking switching at 32.768Mb/s
• 16 serial input and output streams
• Accepts single-bit single-data streams at 32.768Mb/s
• Per-channel Variable Delay Mode for low-latency applications
• Per-channel Constant Delay Mode for frame integrity applications
• Automatic identification of ST-BUS® and GCI bus interfaces
• Automatic frame offset delay measurement
• Per-stream single data frame delay offset programming
• Per-channel high-impedance output control
• Direct microprocessor access to all internal memories
• Memory block programming for quick setup
• IEEE-1149.1 (JTAG) Test Port
• 3.3V Power Supply
• Available in 144-pin (20mm x 20mm) Thin Quad Flatpack (TQFP)
  and 144-pin (13mm x 13mm) Plastic Ball Grid Array (PBGA)
• Operating Temperature Range -40°C to +85°C

IDT72V73250 Connection Diagram

IDT72V73250  Connection Diagram

IDT72V73250 datasheet

IDT72V73250
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