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MFG:IDT  Package Cooled:05+  D/C:PLCC68  

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Part Number: IDT73720

 

MFG: IDT

Package Cooled: 05+

D/C: PLCC68

Description: The IDT73720/A Bus Exchanger is a high speed 16-bit bus exchange device intended for inter-bus communi...


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IDT73720 General Description


The IDT73720/A Bus Exchanger is a high speed 16-bit bus exchange device intended for inter-bus communication in interleaved memory systems and high performance multiplexed address and data buses.

The Bus Exchanger is responsible for interfacing between the CPU A/ D bus (CPU address/data bus) and multiple memory data buses.

The 73720/A uses a three bus architecture (X, Y, Z), with control signals suitable for simple transfer between the CPU bus (X) and either memory bus Y or Z). The Bus Exchanger features independent read and write latches for each memory bus, thus supporting a variety of memory strategies. All three ports support byte enable to independently enable upper and lower bytes.

IDT73720 Maximum Ratings

Symbol
Description
Max
Unit
PT
Power Dissipation
1
V
VTERM
Terminal Voltage with Respect to GND
VCC + 0.5
V
VTER(2)
Operating Temperature
0.5 to +7
° C
TBIAS
Temperature Under Bias
55 to +125
° C
TSTG
Storage Temperature
55 to +125
°C
IOUT
DC Output Current
50
mA

NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

 

IDT73720 Features

High-speed 16-bit bus exchange for interbus communication in the
following environments:
• Multi-way interleaving memory
• Multiplexed address and data buses
Direct interface to R3051 family RISChipSet™
• R3051™ family of integrated RISController™ CPUs
• R3721 DRAM controller
Data path for read and write operations
Low noise 12mA TTL level outputs
Bidirectional 3-bus architecture: X, Y, Z
• One CPU bus: X
• Two (interleaved or banked) memory buses:Y & Z
• Each bus can be independently latched
Byte control on all three buses
Source terminated outputs for low noise and undershoot control
68-pin PLCC and 80-pin PQFP package
High-performance CMOS technology.

IDT73720 Connection Diagram

IDT73720  Connection Diagram

IDT73720 datasheet

IDT73720
PDF/DataSheet Download

  • Datasheet: IDT73720
  • File Size: 76607 KB
  • Manufacturer: IDT [Integrated Device Technology]
  • Click here to Download

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