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Description: The FCT16601AT/CT/ET and FCT162601AT/CT/ET 18bit registered transceivers are built ...


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IDT74FCT16601AT General Description


The FCT16601AT/CT/ET and FCT162601AT/CT/ET 18bit registered transceivers are built using advanced dual metal CMOS technology. These high-speed, low-power 18-bit registered bus transceivers combine D-type latches and D-type flip-flops to allow data flow in either direction in a transparent, latched or clocked mode. Each direction has an independent latch enable, an independent clock with a clock enable, and an independent output enable. The package is organized with a flow-through signal pin organization to ease board layout. All inputs are designed with hysteresis for improved noise margin.

This transceiver is ideally suited for high speed memory interfaces which utilize high speed synchronous writes, by clocking the data into a high speed register. Reads can then be performed in a transparent or latched mode utilizing the same transceiver.

The FCT16601AT/CT/ET are ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers.

The FCT162601AT/CT/ET have balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall timesreducing the need for external series terminating resistors. The FCT162601AT/CT/ET are plug-in replacements for the FCT16601AT/CT/ET and ABT16601 for on-board bus interface applications.

IDT74FCT16601AT Maximum Ratings

Symbol Description Max Unit
VTERM(2) Terminal Voltage with Respect to GND 0.5 to +7.0 V
VTERM(3) Terminal Voltage with Respect to GND 0.5 to VCC+0.5 V
TSTG Storage Temperature 65 to +150 °C
IOUT DC Output Current 60 to +120 mA

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.

IDT74FCT16601AT Features

• Common features:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage £1mA (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
Extended commercial range of -40°C to +85°C
VCC = 5V ±10%
• Features for FCT16601AT/CT/ET:
High drive outputs (-32mA IOH, 64mA IOL)
Power off disable outputs permit "live insertion"
Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C
• Features for FCT162601AT/CT/ET:
Balanced Output Drivers: ±24mA
Reduced system switching noise
Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V,TA = 25°C

IDT74FCT16601AT Connection Diagram

IDT74FCT16601AT  Connection Diagram

IDT74FCT16601AT datasheet

IDT74FCT16601AT
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