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Part Number: IDT74LVC273A

 

 

 

 

Description: The octal D-type flip-flop with reset, positive edge trigger is built using advanced dual metal CMOS t...


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IDT74LVC273A General Description


The octal D-type flip-flop with reset, positive edge trigger is built using advanced dual metal CMOS technology. This high-speed, low power device is ideal for driving high capacitance loads such as memory address and data buses.

All pins can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V supply system.

IDT74LVC273A Maximum Ratings

Symbol
Description
Max
Unit
VTERM
Terminal Voltage with Respect to GND
0.5 to +6.5
V
TSTG
Storage Temperature
65 to +150
°C
IOUT
DC Output Current
50 to +50
mA
IIK
IOK
Continuous Clamp Current,
VI < 0 or VO < 0
50
mA
ICC
ISS
Continuous Current through each
VCC or GND
±100
mA

NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

IDT74LVC273A Features

• 0.5 MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4 W typ. static)
• Rail-to-rail output swing for increased noise margin
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SOIC, SSOP, QSOP, and TSSOP packages
• High Output Drivers: ±24mA
• Reduced system switching noise

IDT74LVC273A Typical Application

• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems

IDT74LVC273A Connection Diagram

IDT74LVC273A  Connection Diagram

IDT74LVC273A datasheet

IDT74LVC273A
PDF/DataSheet Download

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