IDT74LVC32A

Features:

• 0.5 MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
• V_CC = 3.3V ± 0.3V, Normal Range
• V_CC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4 W typ. static)
• Rail-to-Rail output swing for increased noise margin
• All inputs, outputs, and I/Os are 5V tolerant
• Supports hot insertion
• Available in SOIC, SSOP, and TSSOP packages
• High Output Drivers: ±24mA
• Reduced system switching noise


Application

• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems


Pinout




Specifications

Symbol	Description	Max	Uni
VTERM	Terminal Voltage with Respect to GND	0.5 to +6.5	V
TSTG	Storage Temperature	65 to +150	°C
IOUT	DC Output Current	50 to +50	mA
IIK IOK	Continuous Clamp Current, VI < 0 or VO < 0	50	mA
ICC ISS	Continuous Current through each VCC or GND	±100	mA

Description

The IDT74LVC32A quadruple 2-input positive -OR gate is built using advanced dual metal CMOS technology. The IDT74LVC32A device performs the Boolean
function Y = A + B or Y = A · B in positive logic.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V system environment.

The IDT74LVC32A has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance.