IDT74LVCH16260A

Features: Typical tSK(0) (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0.635mm pitch SSOP, 0.50mm pitch TSSOP and 0.40mm pitch TVSOP packages Extended commercial range of -40°C to +85°C VCC = 3.3V ±0.3V, Normal Range VCC = 2.7...

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SeekIC No. : 004373200 Detail

IDT74LVCH16260A: Features: Typical tSK(0) (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0.635mm pitch SSOP, 0.50mm pitch TSSOP and 0.40mm pitch...

floor Price/Ceiling Price

Part Number:
IDT74LVCH16260A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/2

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Product Details

Description



Features:

Typical tSK(0) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015;
    > 200V using machine model (C = 200pF, R =
0.635mm pitch SSOP, 0.50mm pitch TSSOP
    and 0.40mm pitch TVSOP packages
Extended commercial range of -40°C to +85°C
VCC = 3.3V ±0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4µW typ. static)
 All inputs, outputs and I/O are 5 Volt tolerant
 Supports hot insertion
    Drive Features for LVCH16260A:
High Output Drivers:  ±24mA
Reduced system switching noise



Application

•  5V and 3.3V mixed voltage systems
•  Data communication and telecommunication systems



Specifications

Symbol Description Max. Unit
VTERM(2) Terminal Voltage with Respect to GND 0.5 to +6.5 V
VTERM(3) Terminal Voltage with Respect to GND 0.5 to +6.5 V
TSTG Storage Temperature 65 to +150 °C
IOUT  DC Output Current 50 to +50 mA
IIK IOK Continuous Clamp Current,VI < 0 or VO < 0
50
mA
ICC ISS Continuous Current through
each VCC or GND
±100 mA



Description

The IDT74LVCH16260A tri-port bus exchanger is built using advanced dual metal CMOS technology. The LVCH16260A is a high-speed 12-bit latched bus multiplexer/transceiver for use in high-speed microprocessor applications. This bus exchanger supports memory interleaving with latched outputs on the B ports and address multiplexing with latched inputs on the B ports.

The IDT74LVCH16260A tri-port bus exchanger has three 12-bit ports.  Data may be transferred between the A port and either/both of the B ports.  The latch enable (LE1B, LE2B, LEA1B and LEA2B) inputs control data storage.

When a latch-enable input is high, the latch is transparent.  When a latch- enable input is low, the data at the input is latched and remains latched until the latch enable input is returned high.  Independent output enables (OE1B
and OE2B) allow reading from one port while writing to the other port.

All pins of the 12-bit Bus Exchanger can be driven from either 3.3V or 5V devices.  This feature allows the use of the device as a translator in a mixed 3.3V/5V supply system.

The IDT74LVCH16260A has been designed with a  ±24mA output driver. The driver is capable of driving a moderate to heavy load while maintaining speed performance.

The IDT74LVCH16260A has "bus-hold" which retains the inputs' last state whenever the input goes to a high impedance.  This prevents floating inputs and eliminates the need for pull-up/down resistors.


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