Features: •Typical tSK(o) (Output Skew) < 250ps•ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)•VCC = 3.3V ± 0.3V, Normal Range•VCC = 2.7V to 3.6V, Extended Range•CMOS power levels (0.4 W typ. static)•All inputs, ...
IDT74LVCH16543A: Features: •Typical tSK(o) (Output Skew) < 250ps•ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)•VCC = 3.3V ± 0.3V, Normal RangeR...
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•Typical tSK(o) (Output Skew) < 250ps
•ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
•VCC = 3.3V ± 0.3V, Normal Range
•VCC = 2.7V to 3.6V, Extended Range
•CMOS power levels (0.4 W typ. static)
•All inputs, outputs, and I/O are 5V tolerant
•Supports hot insertion
•Available in SSOP and TSSOP packages
•5V and 3.3V mixed voltage systems
•Data communication and telecommunication systems

| Symbol | Description | Max | Unit |
| VTERM | Terminal Voltage with Respect to GND | 0.5 to +6.5 | V |
| TSTG | Storage Temperature | 65 to +150 | |
| IOUT | DC Output Current | 50 to +50 | mA |
| IIK IOK |
Continuous Clamp Current, VI < 0 or VO < 0 |
50 | mA |
| ICC ISS |
Continuous Current through each VCC or GND |
±100 | mA |
The IDT74LVCH16543A 16-bit registered transceiver is built using advanced dual metal CMOS technology. The LVCH16543A can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each register to permit independent control in either direction of data flow. The A-to-B enable (CEAB) input must be low in order to enter data from the A port or to output data from the B port. LEAB controls the latch function. When LEAB is low, the A to B latches iof the IDT74LVCH16543A are transparent. A subsequent low-to-high transition of LEAB puts the A latches in the storage mode. OEABperforms output enable function on the B port. Data flow from the B port to the A port is similar but requires using CEBA, LEBA, and OEBA inputs. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.
All pins of this 16-bit registered transceiver can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V supply system.
The IDT74LVCH16543A has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance.
The IDT74LVCH16543A has "bus-hold" which retains the inputs' last state whenever the input goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors.