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IDT77V500

Features: ` Single chip controller for IDT77V400 Switching Memory` One IDT77V500 and one IDT77V400 form the core required for a 1.2Gbps 8 x 8 port non-blocking switch` Supports up to 8192 Virtual Connections (VCs)` Per VC queuing for fairness, with four priorities per VC available for each output ...

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SeekIC No. : 004373283 Detail

IDT77V500: Features: ` Single chip controller for IDT77V400 Switching Memory` One IDT77V500 and one IDT77V400 form the core required for a 1.2Gbps 8 x 8 port non-blocking switch` Supports up to 8192 Virtual Co...

IDT77V500 Data Sheet

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Part Number:
IDT77V500
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

` Single chip controller for IDT77V400 Switching Memory
` One IDT77V500 and one IDT77V400 form the core required for a 1.2Gbps 8 x 8 port non-blocking switch
` Supports up to 8192 Virtual Connections (VCs)
` Per VC queuing for fairness, with four priorities per VC available for each output port of the switch
` Capable of supporting CBR, VBR, UBR, and ABR (EFCI) service classes
` Low power dissipation – 430mW (typ.)
` Optional header modification operation
` Multicasting and Broadcasting capability
` Provides congestion management support through EFCI, CLP, and EPD functionality
` System clock cycle times as fast as 25ns (40MHz)
` Option available for resolving contention issues between multiple IDT77V500 configurations
` One IDT77V500 can manage up to eight IDT77V400's without derating for larger switch configurations
` Industrial temperature range (-40° C to +85° C) is available
` Single +3.3V ± 300mV power supply
` Available in a 100-pin Thin Plastic Quad Flat Pack (TQFP) and 144-ball BGA


Pinout

Connection Diagram


Specifications

Symbol Description Max Unit
VTERM2 Terminal Voltage with Respect to GND -0.5 to +5.5 V
TBIAS Temperature Under Bias -55 to +125 °C
TSTG Storage Temperature -55 to +120 °C
IOUT DC Output Current 50 mA

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VTERM must not exceed Vcc + 0.3V for more than 25% of the cycle time or 10ns maximum, and is limited to 20mA for the period of VTERM Vcc + 0.3V




Description

The IDT77V500 ATM Cell Based Switch Controller, when paired with the IDT77V400 Switching Memory, forms the core control logic and switch fabric for a 1.2Gbps non-blocking ATM switch. The IDT77V500 manages all of the switch traffic moving through the IDT77V400, commanding the storage of incoming ATM cells and interpreting and modifying the cell header information as necessary for data flow through the switch. IDT77V500 then uses the header information, including priority indicators, to queue and direct the individual cells for transmission out the appropriate output port of the IDT77V400.




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