IDTCV104B

Features: * 4 PLL architecture* Linear frequency programming* Independent frequency programming and SSC control* Band-gap circuit for differential output* High power-noise rejection ratio* 66MHz to 533MHz CPU frequency* VCO frequency up to 1.1G* Support index block read/write, single cycle index b...

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IDTCV104B Picture
SeekIC No. : 004373391 Detail

IDTCV104B: Features: * 4 PLL architecture* Linear frequency programming* Independent frequency programming and SSC control* Band-gap circuit for differential output* High power-noise rejection ratio* 66MHz to ...

floor Price/Ceiling Price

Part Number:
IDTCV104B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/1

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Product Details

Description



Features:

* 4 PLL architecture
* Linear frequency programming
* Independent frequency programming and SSC control
* Band-gap circuit for differential output
* High power-noise rejection ratio
* 66MHz to 533MHz CPU frequency
* VCO frequency up to 1.1G
* Support index block read/write, single cycle index block read
* Programmable REF, 3V66, PCI, 48MHz I/O drive strength
* Programmable 3V66 and PCI Skew
* Available in SSOP package



Pinout

  Connection Diagram


Specifications

Symbol





Description




Min
Max




Unit

VDDA
3.3V Core Supply Voltage
4.6
V
VDDIN
3.3V Logic Input Supply Voltage
GND - 0.5

0
4.6
V
TSTG
Storage Temperature

65
+150
°C
TAMBIENT
Ambient Operating Temperature
0
+70
°C
TCASE
Case Temperature
+115
°C
ESD Prot

Input ESD Protection
Human Body Model
2000
V



Description

IDTCV104B  is a 48 pin clock generation device for desktop PC platforms. This chip of IDTCV104B incorporates four PLLs to allow independent generation of CPU, AGP/ PCI, SRC, and 48MHz clocks.  The dedicated PLL for Serial ATA clock provides high accuracy frequency.  IDTCV104B also implements Band-gap referenced IREF to reduce the impact of VDD variation on differential outputs, which can provide more robust system performance.
Static PLL frequency divide error of IDTCV104B can be as low as 36 ppm, providing high accuracy output clock.  Each CPU, AGP / PCI, SRC clock has its own Spread Spectrum selection.


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