Output Device
: PhotoTriac
Isolation Voltage
: 5300 Vrms
Packaging
: Tube
Features: • High Input Sensitivity
• IFT = 2.0 mA, PF = 1.0
• IFT = 5.0 mA, PF 1.0
• 300 mA On-State Current
• Zero Voltage Crossing Detector
• 600/800 V Blocking Voltage
• High Static dV/dt 10 kV/s
• Inverse Parallel SCRs Provide Commutating
dV/dt >10 kV/s
• Very Low Leakage < 10 A
• Isolation Test Voltage 5300 VRMS
• Small 6-Pin DIP Package
• Lead-free component
• Component in accordance to RoHS 2002/95/EC
and WEEE 2002/96/ECApplicationSolid-state relays
Industrial controls
Office equipment
Consumer appliancesPinout
SpecificationsTamb = 25 , unless otherwise specified Stresses in excess of the absolute Maximum Ratings can cause permanent damage to the device. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of this document. Exposure to absolute Maximum Rating for extended periods of the time can adversely affect reliability.
| Parameter |
Test condition |
Symbol |
Value |
Unit |
| Reverse voltage |
|
VR |
6.0 |
V |
| Forward current |
|
IF |
60 |
mA |
| Surge current |
|
IFSM |
2.5 |
A |
| Power dissipation |
|
Pdiss |
100 |
mW |
| Derate from 25 |
|
|
1.33 |
mW/ |
DescriptionThe IL4108 consists of a GaAs IRLED optically coupled to a photosensitive zero crossing TRIAC network.
The TRIAC consists of two inverse parallel connected monolithic SCRs. These three semiconductors of the IL4108 are assembled in a six pin dual in-line package.
High input sensitivity is achieved by using an emitter follower phototransistor and a cascaded SCR predriver resulting in an LED trigger current of less than 2.0 mA (DC).
The IL410/ IL4108 uses two discrete SCRs resulting in a commutating dV/dt greater than 10 kV/s. The use of a proprietary dV/dt clamp results in a static dV/ dt of greater than 10 kV/s. This clamp circuit has a MOSFET that is enhanced when high dV/dt spikes occur between MT1 and MT2 of the TRIAC. When conducting, the FET clamps the base of the phototransistor, disabling the first stage SCR predriver.
The zero cross line voltage detection circuit of the IL4108 consists of two enhancement MOSFETS and a photodiode.
The inhibit voltage of the network of the IL4108 is determined by the enhancement voltage of the N-channel FET. The Pchannel FET is enabled by a photocurrent source that permits the FET to conduct the main voltage to gate on the N-channel FET. Once the main voltage can enable the N-channel, it clamps the base of the phototransistor, disabling the first stage SCR predriver. The 600/800 V blocking voltage permits control of offline voltages up to 240 VAC, with a safety factor of more than two, and is sufficient for as much as 380 VAC.
The IL410/ IL4108 isolates low-voltage logic from 120, 240, and 380 VAC lines to control resistive, inductive, or capacitive loads including motors, solenoids, high current thyristors or TRIAC and relays.
IL4108 Data Sheet
