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Part Number: IM29LV001T

 

 

 

 

Description: The IM29LV001T/B is a 1 Mega-bit, 5V-only page erasable flash memory organized as 128K X 8 bits.It is ...


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IM29LV001T General Description


The IM29LV001T/B is a 1 Mega-bit, 5V-only page erasable flash memory organized as 128K X 8 bits.It is manufactured with IMT's proprietary double metal, 0.40 m CMOS flash technology. High performance cell design and advanced process technology attain better reliability, manufacturability, circuit performance and future scaleability than other alternative approaches. Fast, self-timed program/erase operations are made possible with an innovative cell and array architecture which is free from the over-erase problem of the traditional stacked-gate structures.

Single page (512 bytes) data alterability ensures optimum flexibility and efficiency in program codes, parameters and data storage. It also allows backward compatibility to other large-erase-block based flash products for direct replacement.

The IM29LV001T/B is designed with interface features for direct in-system programming and erase operations. Vendor re-programmable, hardwired data protection is provided for absolute prevention in inadvertent data alteration and virus infection.

The IM29LV001 conforms to the JEDEC byte wide memory pin-out and single supply flash command standards.

Designed, manufactured and tested for extended endurance applications, the IM29LV001 is specified for more than 104 cycling endurance and greater than 10 years of data retention.

IM29LV001T Maximum Ratings

Storage temperature.-65 to +150
Ambient temperature with power
applied.........-65 to +125
Voltage with respect to ground
Vcc..........   . -0.5 V to 3.6 V
A9 ..........   -0.5 V to +12.5 V
All the other pins..-0.5 V to Vcc + 0.5 V

IM29LV001T Features

` 0.40 m, triple-poly double-metal CMOS process
` Single power supply operation
   3.3V ± 10% for both read and write
` High endurance
   > 10,000 program/erase cycles
` Fast read access time
   70 and 90 ns
` Single page erasability for optimal data
   alterability
   Page size: 512 bytes
` Hardwired data protection
   Inhibits program and erase operations of
   the top (IM29LV001T) or bottom
   (IM29LV001B) 32 pages of the array for
   false write and virus prevention.
` Flexible boot block configurability
` Fast program and erase operations:
   Byte program : < 35 sec typical
   Page erase : < 7 msec typical
   Chip erase : < 2 sec typical
` Self-timed program/erase operations
   with end-of-cycle detection
   Data# Polling and Toggle Bit
` Inadvertent write protection
   Glitch filtering for WE# and CE#
   Low Vcc (< 2.2 V ) write inhibit
   Hardwired data protection
` Low Icc for power conservation
   Read: 6 ma typical
   Write: 10 ma typical
   Stand-by: 10 A typical
` Compatible with JEDEC byte wide pinout
   and single-supply flash command
   standards
` Package types:
   32-pin PLCC, TSOP and PDIP
   Others available upon request

IM29LV001T Connection Diagram

IM29LV001T  Connection Diagram

IM29LV001T datasheet

IM2000S
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