IP4771CZ16

·Integrated high-level ESD protection, buffering, SYNC signal impedance matching and level shifting
·Terminal connections with integrated rail-to-rail clamping diodes with downstream ESD protection of ±8 kV  ccording to IEC 61000-4-2, level 4 standard
·Backflow protection on DDC lines
·Drivers for HSYNC and VSYNC lines
·Bidirectional level shifting N-channel FETs available for DDC clock and DDC data channels
·Integrated impedance matching resistors onSYNC lines
·Line capacitance < 4 pF per channel
·Lead-free package and RoHS compliant

The IP4770CZ16, IP4771CZ16, IP4772CZ16 is connected between the VGA/DVI interface and the video graphics controller and includes level shifting for the DDC signals, buffering for the SYNC lines as well as high-level ESD protection diodes for the RGB signal lines.

The level shifting functions of the IP4771CZ16 are required when the DDC controller operates at a lower supply voltage than the monitor. To use this level shifting function the gates of the two N-channel MOSFETs have to be connected to the supply rail of the DDC transceivers. Buffering for the SYNC signals is provided by two non-inverting buffers, which accept TTL input levels and convert these to CMOS compliant output levels between pins V _CC(SYNC)  and GND.

The IP4770CZ16 and IP4771CZ16 contain the formerly external termination resistors,  which are typically required for the HSYNC and VSYNC lines of the video interface:
• IP4770CZ16: Rsync = 55
• IP4771CZ16: Rsync = 65
• IP4772CZ16: Rsync =10 to allow termination of the SYNC lines

All RGB I/Os are protected by a special diode configuration offering a low line capacitance of 4 pF (maximum) only to provide protection to downstream components for ESD voltages as high as ±8 kV contact discharge according to IEC 61000-4-2, level 4 standard.