Features: • Floating channel designed for bootstrap operation• Fully operational to +200 V• Tolerant to negative transient voltage, dV/dt immune• Gate drive supply range from 10 V to 20 V• Undervoltage lockout• 3.3 V, 5 V, and 15 V input logic compatible• ...
IRS2004S: Features: • Floating channel designed for bootstrap operation• Fully operational to +200 V• Tolerant to negative transient voltage, dV/dt immune• Gate drive supply range from...
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Features: • Floating channel designed for bootstrap operation• Fully operational to +2...
| Symbol | Definition | Min. | Max. | Units | |
| VB | High-side floating absolute voltage | -0.3 | 225 | V | |
| VS | High-side floating supply offset voltage | VB - 25 | VB + 0.3 | ||
| VHO | High-side floating output voltage | VS - 0.3 | VB + 0.3 | ||
| VCC | Low-side and logic fixed supply voltage | -0.3 | 25 | ||
| VLO | Low-side output voltage | -0.3 | VCC + 0.3 | ||
| VIN | Logic input voltage (IN & SD ) | -0.3 | VCC + 0.3 | ||
| dVs/dt | Allowable offset supply voltage transient | - | 50 | V/ns | |
| PD | Package power dissipation @ TA +25 | 8 lead PDIP) | - | 1.0 | W |
| (8 lead SOIC) | - | 0.625 | |||
| RthJA | Thermal resistance, junction to ambient | (8 lead PDIP) | - | 125 | /W |
| (8 lead SOIC) | - | 200 | |||
| TJ | Junction temperature | - | 150 | ||
| TS | Storage temperature | -55 | 150 | ||
| TL | Lead temperature (soldering, 10 seconds) | - | 300 | ||
The IRS2004 is a high voltage, high speed power MOSFET and IGBT driver with dependent high- and lowside referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver crossconduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates from 10 V to 200 V.