IS34C02B

Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

The IS34C02B is an electrically erasable PROM device that uses the industry-standard I2C communication protocol. The IS34C02B contains a non-volatile memory array of 2,048-bits (256K x 8 bytes), and is further subdivided into 16 pages of 16 bytes each for Pagewrite mode. The device operates over the voltage range of 1.7V to 3.6V to satisfy the voltage requirements of DDR2, DDR1, and many other specifications. In normal Read or Write operations, a master device communicates with the EEPROM via the two wires Serial Clock and Serial Data. During application system boot-up, it may be necessary to read out the contents of the IS34C02B that pertain to the configuration of a DRAM module. If the module manufacturer wishes to safeguard this memory content, the first half of the array can be write-protected with either a permanent or reversible software command, or the entire array can be writeprotected with the WP input pin. The IS34C02B has three address pins, allowing up to eight devices (or memory modules) to be uniquely accessible in a system. To minimize board real-estate, IS34C02B is available in two space-saving packages: TSSOP(8), and DFN(8). All these features make the device ideal for use as a Serial Presence Detect (SPD) EEPROM in various types of memory modules.