IS61C64B

Features: • High-speed access time: 10, 12, and 15 ns• Automatic power-down when chip is deselected• CMOS low power operation- 450 mW (typical) operating- 250 W (typical) standby• TTL compatible interface levels• Single 5V power supply• Fully static operation: n...

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IS61C64B Picture
SeekIC No. : 004379134 Detail

IS61C64B: Features: • High-speed access time: 10, 12, and 15 ns• Automatic power-down when chip is deselected• CMOS low power operation- 450 mW (typical) operating- 250 W (typical) standby&#...

floor Price/Ceiling Price

Part Number:
IS61C64B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/29

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Product Details

Description



Features:

• High-speed access time: 10, 12, and 15 ns
• Automatic power-down when chip is deselected
• CMOS low power operation
- 450 mW (typical) operating
- 250 W (typical) standby
• TTL compatible interface levels
• Single 5V power supply
• Fully static operation: no clock or refresh required
• Three state outputs
• One Chip Enables (CE) for increased speed



Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
VTERM Terminal Voltage with Respect to GND 0.5 to +7.0 V
TBIAS Temperature Under Bias 10 to +85
TSTG Storage Temperature 65 to +150
PT Power Dissipation 1.0 W
IOUT DC Output Current (LOW) 20 mA

Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Expos




Description

The ISSI IS61C64B is a very high-speed, low power, 8192-word by 8-bit static RAM. It is fabricated using ISSI's highperformance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 10 ns with low power consumption.

When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 250 W (typical) with CMOS input levels.

Easy memory expansion is provided by using one Chip Enable input, CE. The active LOW Write Enable (WE) controls both writing and reading of the memory.

The IS61C64B is packaged in the JEDEC standard 28-pin, 300-mil SOJ, and TSOP.




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