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IS61LV12816

Features: • High-speed access time: 8, 10, 12, and 15 ns• CMOS low power operation• TTL and CMOS compatible interface levels• Single 3.3V ± 10% power supply• Fully static operation: no clock or refresh required• Three state outputs• Data control for upper ...

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IS61LV12816: Features: • High-speed access time: 8, 10, 12, and 15 ns• CMOS low power operation• TTL and CMOS compatible interface levels• Single 3.3V ± 10% power supply• Fully stat...

IS61LV12816 Data Sheet

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Part Number:
IS61LV12816
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• High-speed access time: 8, 10, 12, and 15 ns
• CMOS low power operation
• TTL and CMOS compatible interface levels
• Single 3.3V ± 10% power supply
• Fully static operation: no clock or refresh required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available


Pinout

Connection Diagram


Specifications

Symbol Parameter
Value
Unit
VCC Power Supply Voltage Relative to GND
0.5 to +5.0
V
VTERM Terminal Voltage with Respect to GND
0.5 to VCC +0.5
V
TSTG Storage Temperature
65 to +150
TBIAS Temperature Under Bias: Com.
                                          Ind.
10 to + 85
45 to +90

PT Power Dissipation
2.0
W
IOUT DC Output Current
±20
mA
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.


Description

 

The ISSI IS61LV12816 is a high-speed, 2,097,152-bit static RAM organized as 131,072 words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 8 ns with low power consumption.

When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels.

Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access.

The IS61LV12816 is packaged in the JEDEC standard 44-pin 400-mil SOJ, 44-pin TSOP, 44-pin LQFP, and 48-pin mini BGA (6mm x 8mm).




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