IS61LV3216L

Features: •High-speed access time: 10, 12, 15, and 20 ns•CMOS low power operation- 130 mW (typical) operating- 150 µW (typical) standby•TTL compatible interface levels•Single 3.3V + 10%, 5% power supply for 10and 12 ns•Single 3.3V ± 10% power supply for 15and 20...

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IS61LV3216L Picture
SeekIC No. : 004379158 Detail

IS61LV3216L: Features: •High-speed access time: 10, 12, 15, and 20 ns•CMOS low power operation- 130 mW (typical) operating- 150 µW (typical) standby•TTL compatible interface levels•...

floor Price/Ceiling Price

Part Number:
IS61LV3216L
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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268 Transactions

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Upload time: 2024/4/29

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Product Details

Description



Features:

•High-speed access time: 10, 12, 15, and 20 ns
•CMOS low power operation
- 130 mW (typical) operating
- 150 µW (typical) standby
•TTL compatible interface levels
•Single 3.3V + 10%, 5% power supply for 10and 12 ns
•Single 3.3V ± 10% power supply for 15and 20 ns
•Fully static operation: no clock or refreshrequired
•Three state outputs
•Industrial temperature available
•Available in 44-pin 400-mil SOJ package and44-pin TSOP (Type II)



Pinout

  Connection Diagram  Connection Diagram


Specifications

Symbol

Parameter

Value

Unit

VCC

Supply Voltage with Respect to GND

0.5 to +4.6

V

VTERM

Terminal Voltage with Respect to GND

0.5 to Vcc + 0.5

V

TSTG

Storage Temperature

65 to +150

°C

PT

Power Dissipation

1.0

W

IOUT

DC Output Current (LOW)

20

mA




Description

The ISSI IS61LV3216L is a high-speed, 512K static RAM organized as 32,768 words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reli-able process coupled with innovative circuit design tech-niques, yields fast access times with low power consumption.

When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 150 µW (typical) with CMOS input levels.

Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW WriteEnable (WE) controls both writing and reading of the memory.A data byte allows Upper Byte (UB) and Lower Byte (LB) access.

The IS61LV3216L is packaged in the JEDEC standard 44-pin 400-mil SOJ and 44-pin TSOP (Type II).




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