ISL3873

• USB Host Interface Supports USB V1.1 at 12Mbps.
• New Start Up Modes Allow the PCMCIA Card Information Structure to be Initialized From a Serial EEPROM. This Allows Firmware to be Downloaded from the Host, Eliminating the Parallel Flash Memory Device
• Firmware Can be Loaded from Serial Flash Memory
• Zero Glue Connection to 16-Bit Wide SRAM Devices
• Low Frequency Crystal Oscillator to Maintain Time and Allow Baseband Clock Source to Power off During Sleep Mode
• Improved Performance of Internal WEP Engine
• Improvements to Debug Mode Support Tracing Execution From on Chip Memory
• Programmable MBUS Cycle Extension Allows Accessing of Slow Memory Devices Without Slowing the Clock
• Complete DSSS Baseband Processor
• RAKE Receiver with Decision Feedback Equalizer
• Processing Gain . . . . . . . . . . . . . . . . . . . . FCC Compliant
• Programmable Data Rate. . . . . . . . 1, 2, 5.5, and 11Mbps
• Ultra Small Package . . . . . . . . . . . . . . . . . . . . . 14 x 14mm
• Single Supply Operation. . . . . . . . . . . . . . . . . 2.7V to 3.6V
• Modulation Methods . . . . . . . . DBPSK, DQPSK, and CCK
• Supports Full or Half Duplex Operations
• On-Chip A/D and D/A Converters for I/Q Data (6-Bit, 22MSPS), AGC, and Adaptive Power Control (7-Bit)
• Targeted for Multipath Delay Spreads 125ns at 11Mbps, 250ns at 5.5Mbps
• Supports Short Preamble and Antenna Diversity

The Intersil ISL3873 Wireless LAN Integrated Medium Access Controller with Integrated Baseband Processor is part of the PRISM® 2.4GHz radio chip set. The ISL3873 directly interfaces with the Intersil's IF QMODEM (HFA3783). Adding Intersil's RF/IF Converter (ISL3685) and Intersil's Power Amp (HFA3983) offers the designer a complete end-to-end WLAN Chip Set solution. Protocol and PHY support are implemented in firmware thus, supporting customization of the WLAN solution.

Firmware implements the full IEEE 802.11 Wireless LAN MAC protocol. It supports BSS and IBSS operation under DCF, and operation under the optional Point Coordination Function (PCF). Low level protocol functions such as RTS/CTS generation and acknowledgment, fragmentation and de-fragmentation, and automatic beacon monitoring are handled without host intervention. Active scanning is performed autonomously once initiated by host command. Host interface command and status handshakes allow concurrent operations from multi-threaded I/O drivers. Additional firmware functions specific to access point applications are also available.

The ISL3873 has on-board A/Ds and D/A for analog I and Q inputs and outputs, for which the HFA3783 IF QMODEM is recommended. Differential phase shift keying modulation schemes DBPSK and DQPSK, with data scrambling capability, are available along with Complementary Code Keying to provide a variety of data rates. Both Receive and Transmit AGC functions with 7-bit AGC control obtain maximum performance in the analog portions of the transceiver.

 Built-in flexibility allows the ISL3873 to be configured through a general purpose control bus, for a range of applications. The ISL3873 is housed in a thin plastic BGA package suitable for PCMCIA board applications.

The ISL3873 is designed to provide maximum performance with minimum power consumption. External pin layout is organized to provide optimal PC board layout to all user interfaces including PCMCIA and USB.