ISL6271A

The ISL6271A is a versatile power management IC (PMIC)  designed for the Xscale type of processors. The ISL6271A  integrates three regulators, two fault indicators and an ^_I2C  bus for communication with a host microprocessor. Two of  the three regulators function as low power, low drop out  regulators, designed to power SRAM and phase-lock loop  circuitry internal to the Xscale processor. The third regulator  uses a proprietary switch-mode topology to power the  processor core and facilitate Dynamic Voltage Management  (DVM), as defined by Intel.

Since power dissipation inside a microprocessor is  proportional to the square of the core voltage, Intel XScale  processors implement DVM as a means to more efficiently utilize battery capacity. To support this power saving architecture, the ISL6271A integrates an _I 2C bus for communication with the host processor. The processor, acting  as the bus master, transmits a "voltage level" and "voltage  slew rate" to the ISL6271A appropriate to the processing  requirements; higher core voltages support higher operating  frequencies and code execution. The bus is fully compliant  with the Phillips® _I2C protocol and supports both standard  and fast data transmission modes. Alternatively, the output of  the core regulator can be programmed in 50mV increments  from 0.85V to 1.6V using the input Voltage ID (VID) pins. All  three regulators share a common enable pin and are  protected against overcurrent, over temperature and
undervoltage conditions. When disabled via the enable pin,  the ISL6271A enters a low power state that can be used to  conserve battery life while maintaining the last programmed
VID code and slew rate. An integrated soft-start circuit  transitions the ISL6271A output voltages to their default  values at a rate determined by an external soft-start capacitor.