ISPLSI1048C-50LG/883

ISPLSI1048C-50LG/883 is a kind of high-density programmable logic device processed in full compliance to MIL-STD-883. ISPLSI1048C-50LG/883 includes 288 Registers, 96 Universal I/O pins, 12 Dedicated Input pins, two Global Output Enables (GOE), four Dedicated Clock Input pins and a Global Routing Pool (GRP).

There are some features of ISPLSI1048C-50LG/883 as follows. First, ISPLSI1048C-50LG/883 combines erase of use and the fast system speed of PLDs with the density and flexibility of field programmable gate arrays. complete programmable device can combine glue logic and structured designs. It includes four dedicated clock input pins, synchronous and asynchronous clocks. Optimized global routing pool provides global interconnectivity. It has flexible pin placement. In addition, it adopts high perfomance E2CMOS technology. The maximum operating frequency (fmax) is 50 MHz. The propagation delay (tpd) is 22 ns. The inputs and outputs are TTL compatible. Besides, it is electrically erasable and reprogrammable.

What comes next is about the absolute maximum ratings of ISPLSI1048C-50LG/883. The supply voltage VCC is from -0.5 to +7.0 V. The input voltage applied is from -2.5 to VCC+1.0 V. The off-state output voltage applied is from -2.5 to VCC+1.0 V. The storage temperature is from -65 to 150. The case temp. with power applied is from -55 to 125. The maximum junction temp. (TJ) with power applied is 150.