Purchase K3S7V2000M-TC, In-stock K3S7V2000M-TC From SeekIC.
Part Number: K3S7V2000M-TC
Description: The K3S7V2000M-TC is a synchronous high bandwidth mask programmable ROM fabricated with SAMSUNG¢s...
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K3S7V2000M-TC
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DataSheet
General Description
K3S7V2000M-TC General Description
The K3S7V2000M-TC is a synchronous high bandwidth mask programmable ROM fabricated with SAMSUNG¢s high performance CMOS process technology and is organized either as 4,194,304 x16bit(word mode) or as 2,097,152 x32bit(double word mode) depending on polarity of WORD pin.(see pin function description). Synchronous design allows precise cycle control, with the use of system clock, I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.
K3S7V2000M-TC Maximum Ratings
| Parameter | Symbol | Min | Max | Unit |
| Voltage on VDD Relative to Vss | VDD, VDDQ | -0.5 | 4.6 | V |
| Voltage on Any Pin Relative to Vss | VIN, VOUT | -0.5 | VDD + 0.5 4.6 | V |
| Operating Temperature | TA | 0 | 70 | |
| Storage Temperature | TSTG | -55 | 125 | |
| Short circuit current | IOS | - | 50 | mA |
| Power Dissipation | PD | - | 1 | W |
Functional operation should be restricted to recommended operating condition.
K3S7V2000M-TC Features
· JEDEC standard 3.3V power supply
· LVTTL compatible with multiplexed address
· Address: Row address: RA0 ~ RA12
Column address: CA0 ~ CA7 (x32): CA0 ~ CA8 (x16)
· Switchable organization
4,194,304 x 16(word mode) /
2,097,152 x 32(double word mode)
· All inputs are sampled at the rising edge of the system clock
· Read Performance at memory point of view
@33MHz 4-1-1-1 (RAS Latency=1, CAS Latency=3)
@50MHz 5-1-1-1 (RAS Latency=1, CAS Latency=4)
@66MHz 5-1-1-1 (RAS Latency=1, CAS Latency=4)
@83MHz 7-1-1-1 (RAS Latency=2, CAS Latency=5)
@100MHz 7-1-1-1 (RAS Latency=2, CAS Latency=5)
· tSAC : 6ns
· Default mode by user requirement
· MRS cycle with address key programs
-. RAS Latency(1 & 2)
-. CAS Latency(3 ~ 6)
-. Burst Length : 4, 8
-. Burst Type : Sequential & Interleaved
· DQM for data-out masking
· Package :86TSOP2 - 400
· LVTTL compatible with multiplexed address
· Address: Row address: RA0 ~ RA12
Column address: CA0 ~ CA7 (x32): CA0 ~ CA8 (x16)
· Switchable organization
4,194,304 x 16(word mode) /
2,097,152 x 32(double word mode)
· All inputs are sampled at the rising edge of the system clock
· Read Performance at memory point of view
@33MHz 4-1-1-1 (RAS Latency=1, CAS Latency=3)
@50MHz 5-1-1-1 (RAS Latency=1, CAS Latency=4)
@66MHz 5-1-1-1 (RAS Latency=1, CAS Latency=4)
@83MHz 7-1-1-1 (RAS Latency=2, CAS Latency=5)
@100MHz 7-1-1-1 (RAS Latency=2, CAS Latency=5)
· tSAC : 6ns
· Default mode by user requirement
· MRS cycle with address key programs
-. RAS Latency(1 & 2)
-. CAS Latency(3 ~ 6)
-. Burst Length : 4, 8
-. Burst Type : Sequential & Interleaved
· DQM for data-out masking
· Package :86TSOP2 - 400
K3S7V2000M-TC Connection Diagram
K3S7V2000M-TC
PDF/DataSheet Download
- Datasheet: K3S7V2000M-TC
- File Size: 1106626 KB
- Manufacturer: SAMSUNG [Samsung semiconductor]
- Click here to Download
- ·K3S7V2000M-TC10
- SAMSUNG [Samsung semiconductor]
- 64M-Bit (4Mx16 /2Mx32) Synchronous MASKROM
- 1106626 KB
- ·K3S7V2000M-TC12
- SAMSUNG [Samsung semiconductor]
- 64M-Bit (4Mx16 /2Mx32) Synchronous MASKROM
- 1106626 KB
- ·K3S7V2000M-TC15
- SAMSUNG [Samsung semiconductor]
- 64M-Bit (4Mx16 /2Mx32) Synchronous MASKROM
- 1106626 KB
- ·K3S7V2000M-TC20
- SAMSUNG [Samsung semiconductor]
- 64M-Bit (4Mx16 /2Mx32) Synchronous MASKROM
- 1106626 KB
- ·K3S7V2000M-TC30
- SAMSUNG [Samsung semiconductor]
- 64M-Bit (4Mx16 /2Mx32) Synchronous MASKROM
- 1106626 KB
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