Purchase K6R1008V1B, In-stock K6R1008V1B From SeekIC.
Part Number: K6R1008V1B
Description: The K6R1008V1B is a 1,048,576-bit high-speed Static Random Access Memory organized as 131,072 words by...
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K6R1008V1B
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DataSheet
General Description
K6R1008V1B General Description
The K6R1008V1B is a 1,048,576-bit high-speed Static Random Access Memory organized as 131,072 words by 8 bits. The K6R1008V1B uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. The device is fabricated using SAMSUNG ¢s advanced CMOS process and designed for highspeed circuit technology. It is particularly well suited for use in high-density high-speed system applications. The K6R1008V1B is packaged in a 400mil 32-pin plastic SOJ or TSOP2 forward.
K6R1008V1B Maximum Ratings
| Parameter |
Symbol |
Rating |
Unit | |
| Voltage on Any Pin Relative to VSS |
VIN, VOUT |
-0.5 to 4.6 |
V | |
| Voltage on VCC Supply Relative to VSS |
VCC |
-0.5 to 4.6 |
V | |
| Power Dissipation |
PD |
1.0 |
W | |
| Storage Temperature |
TSTG |
-65 to 150 |
°C | |
| Operating Temperature | Commercial |
TA |
0 to 70 |
°C |
| Industrial |
TA |
-40 to 85 |
°C | |
K6R1008V1B Features
• Fast Access Time 8,10,12ns(Max.)
• Low Power Dissipation
Standby (TTL) : 50mA(Max.)
(CMOS) : 5mA(Max.)
0.7mA(Max.) - L-Ver. only
Operating K6R1008V1B-8 : 160mA(Max.)
K6R1008V1B-10 : 155mA(Max.)
K6R1008V1B-12 : 150mA(Max.)
• Single 3.3±0.3V Power Supply
• TTL Compatible Inputs and Outputs
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• 2V Minimum Data Retention ; L-Ver. only
• Center Power/Ground Pin Configuration
• Standard Pin Configuration
K6R1008V1B-J : 32-SOJ-400
K6R1008V1B-T : 32-TSOP2-400CF
• Low Power Dissipation
Standby (TTL) : 50mA(Max.)
(CMOS) : 5mA(Max.)
0.7mA(Max.) - L-Ver. only
Operating K6R1008V1B-8 : 160mA(Max.)
K6R1008V1B-10 : 155mA(Max.)
K6R1008V1B-12 : 150mA(Max.)
• Single 3.3±0.3V Power Supply
• TTL Compatible Inputs and Outputs
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• 2V Minimum Data Retention ; L-Ver. only
• Center Power/Ground Pin Configuration
• Standard Pin Configuration
K6R1008V1B-J : 32-SOJ-400
K6R1008V1B-T : 32-TSOP2-400CF
K6R1008V1B Connection Diagram
K6R1008V1B-B-L
PDF/DataSheet Download
- Datasheet: K6R1008V1B-B-L
- File Size: 189124 KB
- Manufacturer: SAMSUNG [Samsung semiconductor]
- Click here to Download
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K6R1008V1B Relative Products
K6R1008C1C-P
The K6R1008C1C-P is a 1,048,576-bit high-speed Static Random Access Memory organized as 131,072 words by 8 bits. The K6R1008C1C-P uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. ...
K6R1008C1C-L
The K6R1008C1C-L is a 1,048,576-bit high-speed Static Random Access Memory organized as 131,072 words by 8 bits. The K6R1008C1C-L uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. ...
K6R1008C1C-I
The K6R1008C1C-I is a 1,048,576-bit high-speed Static Random Access Memory organized as 131,072 words by 8 bits. The K6R1008C1C-I uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. ...
K6R1008C1C-C
The K6R1008C1C-C is a 1,048,576-bit high-speed Static Random Access Memory organized as 131,072 words by 8 bits. The K6R1008C1C-C uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. ...
K6R1008C1B-I
The K6R1008C1B-I is a 1,048,576-bit high-speed Static Random Access Memory organized as 131,072 words by 8 bits. The K6R1008C1B-I uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. ...
K6R1008C1B-C
The K6R1008C1B-C is a 1,048,576-bit high-speed Static Random Access Memory organized as 131,072 words by 8 bits. The K6R1008C1B-C uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. ...
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