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KAC-1310

Features: • ½ Color SXGA Advanced CMOS Image Sensor• 1280 x 1024 active imaging pixels - progressive scan• Monochrome or Bayer (RGB or CMY) Color Filters• 6.0m pitch square pixels with microlenses• Kodak patented pinned photodiode architecture; high blue QE, l...

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SeekIC No. : 004383850 Detail

KAC-1310: Features: • ½ Color SXGA Advanced CMOS Image Sensor• 1280 x 1024 active imaging pixels - progressive scan• Monochrome or Bayer (RGB or CMY) Color Filters• 6.0m pitch ...

KAC-1310 Data Sheet

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Part Number:
KAC-1310
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/27

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Product Details

Description



Features:

• ½" Color SXGA Advanced CMOS Image Sensor
• 1280 x 1024 active imaging pixels - progressive scan
• Monochrome or Bayer (RGB or CMY) Color Filters
• 6.0m pitch square pixels with microlenses
• Kodak patented pinned photodiode architecture; high blue QE, low dark current, lag free
• High sensitivity, quantum efficiency, and charge conversion efficiency
• True Correlated Double Sampling for low read noise
• Low fixed pattern noise and wide dynamic range
• Antiblooming control and Continuous variable speed rolling electronic shutter
• Single 3.3V power supply; Single master clock
• Digitally programmable via I2C-compatible interface
• Pixel addressability to support 'Window of Interest' windowing, resolution, and sub-sampling
• External sync signal for use with strobe flash
• On-chip 20x programmable gain for white balance and exposure gain
• 10-bit, pipelined algorithmic RSD ADC
• 15 fps full SXGA at 20MHz Master Clock Rate
• 48 pin CLCC package
• Dark reference pixels with automatic Frame Rate Dark Clamp
• Encoded Sync data stream
• Column offset correction circuitry


Specifications

Symbol Parameter Min Max Unit
VDD DC Supply Voltage, VDD = 3.3V (Nominal) 3.0 3.6 V
TA Commercial Operating Temperature 0 40
TJ Junction Temperature 0 55
Notes:
• All parameters are characterized for DC conditions after thermal equilibrium has been established.
• Unused inputs must always be tied to an appropriate logic level, e.g. either VSS or VDD
• For proper operation it is recommended that Vin and Vout be constrained to the range VSS<(Vin or Vout)< VDD


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