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KK74ACT175

Features: • TTL/NMOS Compatible Input Levels• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 4.5 to 5.5 V• Low Input Current: 1.0 A; 0.1 A @ 25• Outputs Source/Sink 24 mAPinoutSpecifications Symbol Parameter Value Unit ...

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SeekIC No. : 004385761 Detail

KK74ACT175: Features: • TTL/NMOS Compatible Input Levels• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 4.5 to 5.5 V• Low Input Current: 1.0 A; 0.1 A @ 25&#...

KK74ACT175 Data Sheet

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Part Number:
KK74ACT175
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 A; 0.1 A @ 25
• Outputs Source/Sink 24 mA


Pinout

Connection Diagram


Specifications

Symbol

Parameter
Value
Unit
VCC
 DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
VIN
DC Input Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
VOUT
DC Output Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
IIN
DC Input Current, per Pin
±20
mA
IOUT
DC Output Current, per Pin
±50
mA
ICC
DC Supply Current, VCC and GND Pins
±50
mA
PD
 Power Dissipation in Still Air, Plastic DIP, SOIC Package
750
500
mW
Tstg
 Storage Temperature
-65 to +150
TL
 Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
260
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/ from 65 to 125
SOIC Package: : - 7 mW/ from 65 to 125*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/ from 65to 125
SOIC Package: : - 7 mW/ from 65 to 125


Description

The KK74ACT175 is identical in pinout to the LS/ALS175, HC/HCT175. The KK74ACT175 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.

This device consists of four D flip-flops with common Reset and Clock inputs, and separate D inputs. Reset (active-low) is asynchronous and occurs when a low level is applied to the Reset input. Information at a D input is transferred to the corresponding Q output on the next positive-going edge of the Clock input.

 




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