KK74ACT257

Features: • TTL/NMOS Compatible Input Levels• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 4.5 to 5.5 V• Low Input Current: 1.0 A; 0.1 A @ 25°C• Outputs Source/Sink 24PinoutSpecifications Characteristics Symbol Rating Unit Sup...

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KK74ACT257 Picture
SeekIC No. : 004385771 Detail

KK74ACT257: Features: • TTL/NMOS Compatible Input Levels• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 4.5 to 5.5 V• Low Input Current: 1.0 A; 0.1 A @ 25°C...

floor Price/Ceiling Price

Part Number:
KK74ACT257
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/26

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Product Details

Description



Features:

• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 A; 0.1 A @ 25°C
• Outputs Source/Sink 24



Pinout

  Connection Diagram


Specifications

Characteristics Symbol Rating Unit
Supply voltage range

DC input voltage

DC output voltage
VCC

VIN

VOUT
-0.5 to +7.0

-0.5~VCC + 0.5

-0.5~VCC + 0.5
V

V

V
Input diode current IIN ±20 mA
DC output current

Power Dissipation in Still Air, Plastic DIP+ SOIC Package+

DC VCC/ground current
IOUT

PD


ICC
±50

750
500

±50
mA

mW


mA
Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) TL 260
Storage temperature TSTG -65 to 150


*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/ from 65° to 125
SOIC Package: : - 7 mW/ from 65° to 125




Description

The KK74ACT257 is identical in pinout to the LS/ALS257, HC/HCT257. The KK74ACT257 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.

This KK74ACT257 selects a (4-bit) nibble from either the A or B inputs as determined by the Select input. The nibble is  esented at the outputs in noninverted from when the Output Enable pin is at a low level. A high level on the Output Enable pin switches the outputs into the high-impedance state.




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