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Part Number: KM418RD8AC(D)
Description: Figure 2 is a block diagram of the 128/144 Mbit Direct RDRAM. It consists of two major blocks: a "core" block built fro...


Description: Figure 2 is a block diagram of the 128/144 Mbit Direct RDRAM. It consists of two major blocks: a "core" block built fro...
| Symbol | Parameter | Min | Max | Unit |
| VI,ABS | Voltage applied to any RSL or CMOS pin with respect to Gnd | - 0.3 | VDD+0.3 | V |
| VDD,ABS, VDDA,ABS | Voltage on VDD and VDDA with respect to Gnd | - 0.5 | VDD+1.0 | V |
| TSTORE | Storage temperature | - 50 | 100 | °C |
¨ Highest sustained bandwidth per DRAM device
- 1.6GB/s sustained data transfer rate
- Separate control and data buses for maximized efficiency
- Separate row and column control buses for easy scheduling and highest performance
- 32 banks: four transactions can take place simultaneously at full bandwidth data rates
¨ Low latency features
- Write buffer to reduce read latency
- 3 precharge mechanisms for controller flexibility
- Interleaved transactions
¨ Advanced power management:
- Direct RDRAM operates from a 2.5 volt supply
- Multiple low power states allows flexibility in power consumption versus time to transition to active state
- Power-down self-refresh
¨ Organization: 1Kbyte pages and 32 banks, x 16/18
- x18 organization allows ECC configurations or increased storage/bandwidth
- x16 organization for low cost applications
¨ Uses Rambus Signaling Level (RSL) for up to 800MHz operation
KM418RD8AC(D)-RG60
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