KM4216C258

The Samsung KM4216C258 is a CMOS 256K x 16 bit Dual Port DRAM. It consists of a 256K x 16 dynamic random access memory (RAM) port and 512 x 16 static serial access memory (SAM) port.The RAM and SRAM port operate asynchronously except during data transfer between the ports.The SAM port consists of sixteen 512 bit high speed shift registers that are connected to the RAM array through a 8192 bit data transfer gate.The SAM port has serial read capability.

The KM4216C258 has the following features include:(1)fast page mode with extended data out;(2)ram read, write, read-modify-write;(3)serial read (SR);(4)read/real time read transfer (RT, RRT);(5)split read transfer with stop operation (SRT);(6)common data I/O using three state ram output control;(7)all inputs and outputs ttl compatible;(8)refresh:512 cycle/8ms.The mask data is applied in the same manner as in New Masked Write Per Bit mode. Mask Data Register s content is changed by the another LMR, To reset the device back to the New Masked Write Mode, CBRR(CBR Refresh with option reset) cycle must be performed. After power-up, the KM4216C258 initializes in the New Masked Write Mode.

The absolute maximum ratings of the KM4216C258 are:(1)storage temperature:-55 to +150°C;(2)short circuit output current:50mA;(3)voltage on any pin relative to Vss:-1 to +7.0V;(4)voltage on supply relative to Vss:-1 to +7.0V;(5)power disspation:1W.The data in the KM4216C258 is stored on a tiny capacitor within each memory cell. Due to leakage the data may leak off after a period  of  time.  To  maintain  data  integrity  it  is  necessary to refresh each of the 512 rows every 8 ms. Any operation cycle performed in the RAM port refreshes the 8192 bits selected by the row addresses or an on-chip refresh address counter. Either a burst refresh or distributed refresh may be used. There are several ways to accomplish this.