Purchase KM432S2030C, In-stock KM432S2030C From SeekIC.
Part Number: KM432S2030C
Description: The KM432S2030C is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 wor...
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KM432S2030C
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DataSheet
General Description
KM432S2030C General Description
The KM432S2030C is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by 32 bits, fabricated with SAMSUNG¢s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.
KM432S2030C Maximum Ratings
| Parameter | Symbol | Rating | Unit |
| Voltage on any pin relative to VSS | VIN, VOUT | -1.0 ~ 4.6 | V |
| Voltage on VDD supply relative to VSS | VDD, VDDQ | -1.0 ~ 4.6 | V |
| Storage temperature | TSTG | -55 to +150 | °C |
| Power dissipation | PD | 1.0 | W |
| Short circuit current | IOS | 50 | mA |
Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
KM432S2030C Features
• 3.3V power supply
• LVTTL compatible with multiplexed address
• Four banks operation
• MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system clock
• Burst read single-bit write operation
• DQM for masking
• Auto & self refresh
• 15.6us refresh duty cycle
• LVTTL compatible with multiplexed address
• Four banks operation
• MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system clock
• Burst read single-bit write operation
• DQM for masking
• Auto & self refresh
• 15.6us refresh duty cycle
KM432S2030C Connection Diagram
KM432S2030C
PDF/DataSheet Download
- Datasheet: KM432S2030C
- File Size: 1190530 KB
- Manufacturer: SAMSUNG [Samsung semiconductor]
- Click here to Download
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