Purchase KM44S32030B, In-stock KM44S32030B From SeekIC.
Part Number: KM44S32030B
Description: The KM44S32030B is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 8,388,608 ...
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KM44S32030B
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DataSheet
General Description
KM44S32030B General Description
The KM44S32030B is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 8,388,608 words by 4 bits, fabricated with SAMSUNG¢s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.
KM44S32030B Maximum Ratings
| Parameter | Symbol | Rating | Unit |
| Voltage on any pin relative to VSS | VIN, VOUT | -1.0 ~ 4.6 | V |
| Voltage on VDD supply relative to VSS | VDD, VDDQ | -1.0 ~ 4.6 | V |
| Storage temperature | TSTG | -55 to +150 | °C |
| Power dissipation | PD | 1.0 | W |
| Short circuit current | IOS | 50 | mA |
Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
KM44S32030B Features
• JEDEC standard 3.3V power supply
• LVTTL compatible with multiplexed address
• Four banks operation
• MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8 Page )
-. Burst type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system clock.
• Burst read single-bit write operation
• DQM for masking
• Auto & self refresh
• 64ms refresh period (4K Cycle)
• LVTTL compatible with multiplexed address
• Four banks operation
• MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8 Page )
-. Burst type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system clock.
• Burst read single-bit write operation
• DQM for masking
• Auto & self refresh
• 64ms refresh period (4K Cycle)
KM44S32030B Connection Diagram
KM44S32030B
PDF/DataSheet Download
- Datasheet: KM44S32030B
- File Size: 140891 KB
- Manufacturer: SAMSUNG [Samsung semiconductor]
- Click here to Download
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