MFG:11000 Package Cooled:SHARP
MFG: 11000
Package Cooled: SHARP
Description: This datasheet contains LH28F008SCT-L12 specifications. Section 1 provides a flash memoryovervie...
This datasheet contains LH28F008SCT-L12 specifications. Section 1 provides a flash memory overview. Sections 2, 3, 4, and 5 describe the memory organization and functionality. Section 6 covers electrical specifications. LH28F008SCT-L12 Flash memory documentation also includes application notes and design tools which are referenced in Section 7.
Operating Temperature
During Read, Block Erase, Byte Write
and Lock-Bit Configuration . . . . . . . . . . . 0 to +70(1)
Temperature under Bias . . . . . . . . . . . . . -10 to +80
Storage Temperature ....................... -65to +125
Voltage On Any Pin
(except Vcc Vpp and RP#) . . . . . . . -2.0V to +7.0V(2)
Vcc Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . -2.0v to +7.ov(2)
Vpp Update Voltage during
Block Erase, Byte Write and
Lock-Bit Configuration . . . . . . . . . . . -2.0V to +14.0V(2,3)
RP# Voltage with Respect to
GND during Lock-Bit
Configuration Operations . . . . . . -2.0V to +14.0V(2,3)
Output Short Circuit Current . . . . . . . 1 00mA(4)
1. Operating temperature is for commercia temperature product defined by this specification.
2. All specified voltages are with respect to GND Minimum DC voltage is -09 on input/output pin: and -0.2V on Vcc and Vpp pins. During transitions, this level may undershoot to -2.OV fol periods <20ns. Maximum DC voltage or nput/output pins and Vcc is Vcc+OSV which during transitions, may overshoot to Vcc+2.0V for periods <20ns.
3. Maximum DC voltage on Vpp and RP# may overshoot to +14.OV for periods <20ns.
4. Output shorted for no more than one second. NC more than one output shorted at a time.
The LH28F008SCT-L12 SmartVoltage Flash memory maintains backwards-compatibility with SHARP's 28F008SA. Key enhancements over the 28F008SA include:
*SmartVoltage Technology
*Enhanced Suspend Capabilities
*in-System Block Locking
Both devices share a compatible pinout, status register, and software command set. These similarities enable a clean upgrade from the 28F008SA to LH28F008SCT-L12. When upgrading, it is important to note the following differences:
*Because of new feature support, the two devices have different device codes. This allows for software optimization.
*VPPLK has been lowered from 6.5V to l.5V to support 3.3V and 5V block erase, byte write, and lock-bit configuration operations. The Vppvoltage transitions to GND is recommended for designs that switch Vpp off during read operation.
*To take advantage of SmartVoltage technology, allow Vppconnection to 3.3V or 5V.
LH28F008SCT-L12
PDF/DataSheet Download
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