LXT334

Features:

· Fully integrated quad, short-haul PCM transceiver for G.703 2.048 Mbps or 1.544 Mbps operation
· Single rail supply voltage of 5 V (typical)
· Low power consumption of 410 mW (typical)
· Programmable G.703 transmit pulse shaping for G.703 75 Ω, 100 Ω and 120 Ω systems
· High performance line drivers with constant low impedance for 20 dB return loss (typical) exceeds ETSI 300 166
· On-chip band gap voltage reference for stabilized, constant output amplitude
· High-performance receivers recover data with up to 12 dB cable attenuation
· Low frequency 1.544 or 2.048 MHz reference clock
· On-chip clock recovery function
· Programmable unipolar and bipolar PCM interface
· On-chip AMI and HDB3 encoder/decoder
· On-chip Driver Failure Monitoring circuit
· Local and remote loopback testing function
· Independent Loss of Signal processor for each channel conforms to ITU G.775 recommendation
· Small-footprint 64-pin QFP


Application

· High density line cards using digital backend ASICs


Pinout




Specifications

Parameter	SYMBOL	Min.	Max.	Unit
DC supply voltage	RVCC, RGND	-0.3	6.0	V
Input voltage on any pin1	VIN	GND -0.3	RVCC + 0.3	V
Input voltage on RTIP/RRING	VIN	-6	RVCC + 0.3	V
Transient latchup current on any pin2	IIN	-	100	mA
Input current on any digital pin3	IIN	-10	10	mA
DC input current on TTIP, TRING3	IIN		±100	mA
DC input current on RTIP, RRING3	IIN		±20	mA
Storage temperature	TSTOR	-65	+150
Total package power dissipation			1	W

Caution: Exceeding these values may cause permanent damage to the device. Operation is not guaranteed
              under these conditions. Exposure to absolute maximum rating conditions for extended periods 
              may  adversely affect device reliability.

1. Referenced to ground.
2. Exceeding these values will cause SCR latch-up.
3. Constant input current.


Description

The LXT334 is a quad, short-haul, PCM transceiver for 2.048 MHz or 1.544 MHz transmission systems. Its low impedance transmit output drivers provide constant line impedance whether transmitting marks or spaces. The output pulse amplitudes are also constant, stabilized against supply voltage variations.

The LXT334 can be configured for balanced 100/120 Ω or unbalanced 75 Ω systems and exceeds the latest ETSI return loss recommendations. An on-chip pulse shaping circuit generates accurate transmit pulses independent of the transmit clock duty cycle. All transmitters and receivers incorporate a power down mode with output tri-stating.

The LXT334 features differential receiver architecture with high noise interference margin. It uses peak detection with a variable threshold for reliable recovery of data as low as 500 mV (up to 12 dB of cable attenuation).

The fully digital clock recovery system uses a low frequency master clock of 2.048 MHz or 1.544 MHz as its reference. Each receiver incorporates a combination analog/digital Loss Of Signal (LOS) processor that meets the latest ITU G.775 standard. The LXT334 features a driver failure monitoring circuit in parallel to TTIP and TRING that reports driver shorts.