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LZ21N3VS

Features: ` Optical size : 8.08 mm (aspect ratio 4 : 3) ` Interline scan format ` Square pixel ` Number of effective pixels : 1 650 (H) x 1 250 (V) ` Number of optical black pixels -Horizontal : 2 front and 52 rear -Vertical : 3 front and 2 rear ` Number of dummy bits -Horizontal : 28 - Ver...

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SeekIC No. : 004403757 Detail

LZ21N3VS: Features: ` Optical size : 8.08 mm (aspect ratio 4 : 3) ` Interline scan format ` Square pixel ` Number of effective pixels : 1 650 (H) x 1 250 (V) ` Number of optical black pixels -Horizontal...

LZ21N3VS Data Sheet

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Part Number:
LZ21N3VS
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

  ` Optical size : 8.08 mm (aspect ratio 4 : 3)
  ` Interline scan format
  ` Square pixel
  ` Number of effective pixels : 1 650 (H) x 1 250 (V)
  ` Number of optical black pixels
       - Horizontal : 2 front and 52 rear
       - Vertical : 3 front and 2 rear
  ` Number of dummy bits
      -Horizontal : 28
      - Vertical : 2
  ` Pixel pitch : 3.95 µm (H) x 3.95 µm (V)
  ` R, G, and B primary color mosaic filters
  ` Supports monitoring mode
  ` Low fixed-pattern noise and lag
  ` No burn-in and no image distortion
  ` Blooming suppression structure
  ` Built-in output amplifier
  ` Built-in overflow drain voltage circuit and reset gate voltage circuit
  ` Variable electronic shutter
  ` Packages
      - LZ21N3V : 20-pin half-pitch WDIP [Plastic] (WDIP020-P-0500) Row space : 12.20 mm
      - LZ21N3VS : 20-pin half-pitch WSOP [Plastic] (WSOP020-P-0525)


Pinout

Connection Diagram


Specifications

PARAMETER
SYMBOL
RATING
UNIT
NOTE
Output transistor drain voltage
VOD
0 to +15
V
Overflow drain voltage
VOFD
Internal output
V
1
Reset gate clock voltage
VRS
Internal output
V
2
Vertical shift register clock voltage
VV
VPW to +15
V
Horizontal shift register clock voltage
VH
-0.3 to +12
V
Voltage difference between P-well and vertical clock
VPW-VV
-24 to 0
V
Voltage difference between vertical clocks
VV-VV
0 to +15
V
3
Storage temperature
TSTG
-40 to +85
Ambient operating temperature
TOPR
-20 to +70

NOTES :
1. Do not connect to DC voltage directly. When OFD is connected to GND, connect VOD to GND. Overflow drain clock is applied below 22 Vp-p.
2. Do not connect to DC voltage directly. When RS is connected to GND, connect VOD to GND. Reset gate clock is applied below 8 Vp-p.
3. When clock width is below 10 µs, and clock duty factor is below 0.1%, voltage difference between vertical clocks will be below 22 V.


Description

The LZ21N3V/VS are 1/2-type (8.08 mm) solidstate image sensors that consist of PN photodiodes and CCDs (charge-coupled devices). With approximately 2 140 000 pixels (1 704 horizontal x 1 255 vertical), the sensor provides a stable highresolution color image.




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