M374S6453CTS

Features: * Burst mode operation* Auto & self refresh capability (8192 Cycles/64ms)* LVTTL compatible inputs and outputs* Single 3.3V ± 0.3V power supply* MRS cycle with address key programs Latency (Access from column address) Burst length (1, 2, 4, 8 & Full page) Data scramble (Sequentia...

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SeekIC No. : 004404957 Detail

M374S6453CTS: Features: * Burst mode operation* Auto & self refresh capability (8192 Cycles/64ms)* LVTTL compatible inputs and outputs* Single 3.3V ± 0.3V power supply* MRS cycle with address key programs Lat...

floor Price/Ceiling Price

Part Number:
M374S6453CTS
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/8

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Product Details

Description



Features:

*  Burst mode operation
*  Auto & self refresh capability (8192 Cycles/64ms)
*  LVTTL compatible inputs and outputs
*  Single 3.3V ± 0.3V power supply
*  MRS cycle with address key programs
    Latency (Access from column address)
    Burst length (1, 2, 4, 8 & Full page)
    Data scramble  (Sequential & Interleave)
*  All inputs are sampled at the positive going edge of the  system clock
*  Serial presence detect with EEPROM
*  PCB : Height (1,375mil), double sided component



Specifications

Parameter Symbol Value Unit
Voltage on any pin relative to Vss VIN, VOUT -1.0 ~ 4.6 V
Voltage on VDD supply relative to Vss VDD, VDDQ -1.0 ~ 4.6 V
Storage temperature TSTG -55 ~ +150 0C
Power dissipation PD 18 W
Short circuit current IOS 50 mA



Description

The Samsung M374S6453CTS is a 64M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung M374S6453CTS consists of eighteen CMOS 32M x 8 bit with 4banks Synchronous DRAMs in TSOP-II 400mil package and a 2K EEPROM in 8-pin TSSOP package on a 168-pin glass-epoxy substrate. Two 0.1uF decoupling capacitors are mounted on the printed circuit board in parallel for each SDRAM.

The M374S6453CTS is a Dual In-line Memory Module and is intended for mounting into 168-pin edge connector sockets.

Synchronous design M374S6453CTS allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable latencies M374S6453CTS allows the same device to be useful for a variety of high bandwidth, high performance memory system applications.


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